On Tue, Feb 09, 2021 at 01:05:25PM +0800, Tiezhu Yang wrote: > According to MIPS EJTAG Specification [1], a Debug Breakpoint > exception occurs when an SDBBP instruction is executed, the > CP0_DEBUG bit DBp indicates that a Debug Breakpoint exception > occurred, just check bit DBp for SDBBP is more accurate. > > [1] http://www.t-es-t.hu/download/mips/md00047f.pdf > > Signed-off-by: Tiezhu Yang <yangtiezhu@xxxxxxxxxxx> > --- > > v2: add MIPS_DEBUG_DBP definition > > arch/mips/include/asm/mipsregs.h | 4 ++++ > arch/mips/kernel/genex.S | 4 ++-- > 2 files changed, 6 insertions(+), 2 deletions(-) > > diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h > index a0e8ae5..9c8099a 100644 > --- a/arch/mips/include/asm/mipsregs.h > +++ b/arch/mips/include/asm/mipsregs.h > @@ -1085,6 +1085,10 @@ > #define CVMVMCONF_RMMUSIZEM1_S 0 > #define CVMVMCONF_RMMUSIZEM1 (_U64CAST_(0xff) << CVMVMCONF_RMMUSIZEM1_S) > > +/* Debug register field definitions */ > +#define MIPS_DEBUG_DBP_SHIFT 1 > +#define MIPS_DEBUG_DBP (_ULCAST_(1) << MIPS_DEBUG_DBP_SHIFT) > + > /* > * Coprocessor 1 (FPU) register names > */ > diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S > index bcce32a..743d759 100644 > --- a/arch/mips/kernel/genex.S > +++ b/arch/mips/kernel/genex.S > @@ -349,8 +349,8 @@ NESTED(ejtag_debug_handler, PT_SIZE, sp) > MTC0 k0, CP0_DESAVE > mfc0 k0, CP0_DEBUG > > - sll k0, k0, 30 # Check for SDBBP. > - bgez k0, ejtag_return > + andi k0, k0, MIPS_DEBUG_DBP # Check for SDBBP. > + beqz k0, ejtag_return IMHO both implementations are doing the same thing. Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]
