On Thu, Jan 14, 2021 at 10:34:16AM -0700, Nathan Chancellor wrote:
> When building with clang when CONFIG_CPU_LOONGSON3_WORKAROUNDS is
> enabled:
>
> In file included from lib/errseq.c:4:
> In file included from ./include/linux/atomic.h:7:
> ./arch/mips/include/asm/atomic.h:52:1: warning: converting the result of
> '<<' to a boolean always evaluates to true
> [-Wtautological-constant-compare]
> ATOMIC_OPS(atomic64, s64)
> ^
> ./arch/mips/include/asm/atomic.h:40:9: note: expanded from macro
> 'ATOMIC_OPS'
> return cmpxchg(&v->counter, o, n);
> ^
> ./arch/mips/include/asm/cmpxchg.h:194:7: note: expanded from macro
> 'cmpxchg'
> if (!__SYNC_loongson3_war)
> ^
> ./arch/mips/include/asm/sync.h:147:34: note: expanded from macro
> '__SYNC_loongson3_war'
> # define __SYNC_loongson3_war (1 << 31)
> ^
>
> While it is not wrong that the result of this shift is always true in a
> boolean context, it is not a problem here. Regardless, the warning is
> really noisy so rather than making the shift a boolean implicitly, use
> it in an equality comparison so the shift is used as an integer value.
>
> Fixes: 4d1dbfe6cbec ("MIPS: atomic: Emit Loongson3 sync workarounds within asm")
> Fixes: a91f2a1dba44 ("MIPS: cmpxchg: Omit redundant barriers for Loongson3")
> Reported-by: kernel test robot <lkp@xxxxxxxxx>
> Signed-off-by: Nathan Chancellor <natechancellor@xxxxxxxxx>
> ---
> arch/mips/include/asm/atomic.h | 2 +-
> arch/mips/include/asm/cmpxchg.h | 6 +++---
> 2 files changed, 4 insertions(+), 4 deletions(-)
applied ti mips-next.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
