On Wed, Oct 07, 2020 at 12:17:04PM +0200, Thomas Bogendoerfer wrote: > SGI-IP28 systems only use broken R10k rev 2.5 CPUs, which could lock > up, if ll/sc sequences are issued in certain order. Since those systems > are all non-SMP, we can disable ll/sc usage in kernel. > > Signed-off-by: Thomas Bogendoerfer <tsbogend@xxxxxxxxxxxxxxxx> > --- > arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) applied to mips-next. Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]
