Re: [PATCH] arch: metag: lib: add "umoddi3.S" file for __umoddi3()

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On 12/19/2013 08:17 PM, James Hogan wrote:
> On 19/12/13 12:05, Chen Gang wrote:
>> Use objdump to get "umoddi3.S" for __umoddi3(), the original binary
>> file is "gcc-4.2.4-final/gcc/libgcc/umoddi3.o" which is generated by
>> "gcc-4.2.4/gcc/libgcc2.c".
>>
>> The relate error with allmodconfig:
>>
>>     MODPOST 2909 modules
>>   ERROR: "__umoddi3" [drivers/target/target_core_mod.ko] undefined!
> 
> _umoddi3 is a 64bit division, which should be using the proper division
> functions provided by the kernel in <linux/math64.h>.
> 
> It needs fixing wherever it comes from in drivers/target/target_core_mod.ko.
> 

After disassemble target_core_mod.ko, for me, the compiler will use
___umoddi3 for '%' operator and use ___udivsi3 for '/' operator.

If what I guess is correct, we need use/copy the "system library" which
compiler provides, so just use its ".o" file is OK (just like another
"arch/metag/lib/*.S" have done).


The related C code is below:

 463 static inline int core_alua_state_lba_dependent(
 464         struct se_cmd *cmd,
 465         struct t10_alua_tg_pt_gp *tg_pt_gp,
 466         u8 *alua_ascq)
 467 {
 468         struct se_device *dev = cmd->se_dev;
 469         u32 segment_size, segment_mult, sectors;
 470         u64 lba;
 471 
 472         /* Only need to check for cdb actually containing LBAs */
 473         if (!cmd->se_cmd_flags & SCF_SCSI_DATA_CDB)
 474                 return 0;
 475 
 476         spin_lock(&dev->t10_alua.lba_map_lock);
 477         segment_size = dev->t10_alua.lba_map_segment_size;
 478         segment_mult = dev->t10_alua.lba_map_segment_multiplier;
 479         sectors = cmd->data_length / dev->dev_attrib.block_size;  /* use ___udivsi3 */
 480 
 481         lba = cmd->t_task_lba;
 482         while (lba < cmd->t_task_lba + sectors) {
 483                 struct t10_alua_lba_map *cur_map = NULL, *map;
 484                 struct t10_alua_lba_map_member *map_mem;
 485 
 486                 list_for_each_entry(map, &dev->t10_alua.lba_map_list,
 487                                     lba_map_list) {
 488                         u64 start_lba, last_lba;
 489                         u64 first_lba = map->lba_map_first_lba;
 490 
 491                         if (segment_mult) {
 492                                 start_lba = lba % (segment_size * segment_mult);  /* use ___umoddi3 */
 493                                 last_lba = first_lba + segment_size - 1;
 494                                 if (start_lba >= first_lba &&
 495                                     start_lba <= last_lba) {
 ...



The related disassemble code is below:

 280:   ed 06 18 a7               GETD      D0Ar2,[A0FrP+#52]
 284:   24 d5 38 c6               GETD      D1.7,[D0Ar2+#84]
 288:   04 0e 18 01               MOV       D1Ar1,D1.7
 28c:   20 1c 18 03               ADD       D1Ar1,D1Ar1,#0x384
 290:   f5 05 18 a5               SETD      [A0FrP+#44],D1Ar1
 294:   14 00 00 ab               CALLR     D1RtP,294 <__raw_spin_lock+0x294>
 298:   ed 06 20 a7               GETD      D0FrT,[A0FrP+#52]
 29c:   05 1e 08 00               MOV       D0Ar6,D1.7
 2a0:   24 0a 19 c6               GETD      D1Ar1,[D0FrT+#40]
 2a4:   ad 9c 18 a7               GETD      D0Ar2,[D0Ar6+#1252]
 2a8:   35 76 08 a7               GETD      D1Ar5,[D0Ar6+#944]
 2ac:   ad 75 28 a7               GETD      D0.5,[D0Ar6+#940]
 2b0:   75 05 08 a5               SETD      [A0FrP+#40],D1Ar5
 2b4:   14 00 00 ab               CALLR     D1RtP,2b4 <___udivsi3+0x2b4>
 2b8:   ed 06 10 a7               GETD      D0Ar4,[A0FrP+#52]
 2bc:   6d 05 18 a7               GETD      D0Ar2,[A0FrP+#40]
 2c0:   04 00 00 03               MOV       D1Re0,#0
 2c4:   22 9c 30 c7               GETL      D0.6,D1.6,[D0Ar4+#224]
 2c8:   40 ca 20 60               MULD      D0FrT,D0Ar2,D0.5
 2cc:   00 0c 00 08               ADDS      D0Re0,D0Re0,D0.6
 2d0:   04 0e 18 01               MOV       D1Ar1,D1.7
 2d4:   00 0c 00 01               ADD       D1Re0,D1Re0,D1.6
 2d8:   a0 1d 18 03               ADD       D1Ar1,D1Ar1,#0x3b4
 2dc:   46 00 00 07               ADDCS     D1Re0,D1Re0,#0x1
 2e0:   04 08 08 00               MOV       D0Ar6,D0FrT
 2e4:   04 00 08 03               MOV       D1Ar5,#0
 2e8:   04 0a 10 00               MOV       D0Ar4,D0.5
 2ec:   04 00 10 03               MOV       D1Ar3,#0
 2f0:   75 08 18 a5               SETD      [A0FrP+#64],D1Ar1
 2f4:   ef 03 00 a5               SETL      [A0FrP+#56],D0Re0,D1Re0
 2f8:   6f 02 08 a5               SETL      [A0FrP+#32],D0Ar6,D1Ar5
 2fc:   ef 04 10 a5               SETL      [A0FrP+#72],D0Ar4,D1Ar3
 300:   40 0b 00 a0               B         468 <_target_alua_state_check+0x468>
 304:   05 1e 08 00               MOV       D0Ar6,D1.7
 308:   ad 76 20 a7               GETD      D0FrT,[D0Ar6+#948]
 30c:   a0 06 00 a0               B         3e0 <_target_alua_state_check+0x3e0>
 310:   75 05 08 a7               GETD      D1Ar5,[A0FrP+#40]
 314:   22 c0 29 c7               GETL      D0.5,D1.5,[D0.7]
 318:   00 00 08 73               CMP       D1Ar5,#0
 31c:   c2 03 00 a0               BEQ       394 <_target_alua_state_check+0x394>
 320:   6f 02 10 a7               GETL      D0Ar4,D1Ar3,[A0FrP+#32]
 324:   04 0c 18 00               MOV       D0Ar2,D0.6
 328:   04 0c 18 01               MOV       D1Ar1,D1.6
 32c:   14 00 00 ab               CALLR     D1RtP,32c <___umoddi3+0x32c>
 330:   00 40 01 71               CMP       D1.5,D1Re0
 334:   52 05 00 a0               BHI       3dc <_target_alua_state_check+0x3dc>
 338:   00 40 01 71               CMP       D1.5,D1Re0
 33c:   64 00 00 a0               BNE       348 <_target_alua_state_check+0x348>
 340:   00 40 01 70               CMP       D0.5,D0Re0
 344:   d2 04 00 a0               BHI       3dc <_target_alua_state_check+0x3dc>
 348:   ef 04 08 a7               GETL      D0Ar6,D1Ar5,[A0FrP+#72]
 34c:   fe ff 1f 02               MOV       D0Ar2,#-1
 350:   fe ff 1f 03               MOV       D1Ar1,#-1
 ...


Thanks.
-- 
Chen Gang

Open, share and attitude like air, water and life which God blessed
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