Am 24.06.2014 17:19, schrieb Enrico:
On Tue, May 27, 2014 at 10:38 AM, Enrico <ebutera@xxxxxxxxxxxxxxxx> wrote:
On Mon, May 26, 2014 at 9:50 PM, Laurent Pinchart
<laurent.pinchart@xxxxxxxxxxxxxxxx> wrote:
Hello,
This patch sets implements support for BT.656 and interlaced formats in the
OMAP3 ISP driver. Better late than never I suppose, although given how long
this has been on my to-do list there's probably no valid excuse.
Thanks Laurent!
I hope to have time soon to test it :)
i wanted to try your patches but i'm having a problem (probably not
caused by your patches).
I merged media_tree master and omap3isp branches, applied your patches
and added camera platform data in pdata-quirks, but when loading the
omap3-isp driver i have:
omap3isp: clk_set_rate for cam_mclk failed
The returned value from clk_set_rate is -22 (EINVAL), but i can't see
any other debug message to track it down. Any ides?
I'm testing it on an igep proton (omap3530 version).
Hi Enrico,
please test the attached patch. It is based on Laurent's patches for the
clock and boot testes on an Gumstix Overo with an OMAP3530.
Regards,
Stefan
>From 9f8162ddebf7636e60101f0831d071e73ab6df75 Mon Sep 17 00:00:00 2001
From: Stefan Herbrechtsmeier <stefan@xxxxxxxxxxxxxxxxxxx>
Date: Fri, 13 Jun 2014 18:15:56 +0200
Subject: [PATCH 21/25] ARM: dts: set 'ti,set-rate-parent' for dpll4_m5x2 clock
Set 'ti,set-rate-parent' property for the dpll4_m5x2_ck clock, which
is used for the ISP functional clock. This fixes the OMAP3 ISP driver's
clock rate configuration on OMAP34xx, which needs the rate to be
propagated properly to the divider node (dpll4_m5_ck).
Signed-off-by: Stefan Herbrechtsmeier <stefan@xxxxxxxxxxxxxxxxxxx>
---
arch/arm/boot/dts/omap3xxx-clocks.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/omap3xxx-clocks.dtsi b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
index 25adab1..beeff7c 100644
--- a/arch/arm/boot/dts/omap3xxx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
@@ -465,6 +465,7 @@
ti,bit-shift = <0x1e>;
reg = <0x0d00>;
ti,set-bit-to-disable;
+ ti,set-rate-parent;
};
dpll4_m6_ck: dpll4_m6_ck {
--
2.0.0
