Re: [PATCH 3/3] au8522, au0828: Added demodulator reset

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On Mon, Jan 6, 2014 at 9:53 PM, Devin Heitmueller
<dheitmueller@xxxxxxxxxxxxxx> wrote:
>> I suspect this is actually a different problem which out of dumb luck
>> gets "fixed" by resetting the chip.  Without more details on the
>> specific behavior you are seeing though I cannot really advise on what
>> the correct change is.
>
> Tim,
>
> It might be worth trying out the following patch series and see if it
> addresses the problem you're seeing.  There was a host of problems
> with the clock management on the device which could result in the
> various sub-blocks getting wedged.  The TS output block was just one
> of those cases.
>
> http://git.kernellabs.com/?p=dheitmueller/linuxtv.git;a=shortlog;h=refs/heads/950q_improv
>
> I'm not against the hack you've proposed if it's really warranted, but
> a reset is really a last resort and I'm very concerned it's masking
> over the real problem.
>
> Devin
>
> --
> Devin J. Heitmueller - Kernel Labs
> http://www.kernellabs.com

Devin,

  Commit 2e68a75990011ccd looks interesting.  It makes sense to me
that if we are gating the clock, and it is possible that we are
glitching the clock line, it could put the internal synchronous logic
into a bad state.  If that happens, it would generally require a reset
under a stable clock to get out of that condition.  I will give that
patch a try an see if it addresses issue 1), mentioned above.

However, I'm not sure if that will do anything about issue 2). Do you
have any insight into that one?

 Thanks,

 Tim
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