Add some sanity checks to the calculations and make the REG_16 register write consistent with the other ones. Signed-off-by: Michael Buesch <m@xxxxxxx> --- Index: linux/drivers/media/tuners/fc0011.c =================================================================== --- linux.orig/drivers/media/tuners/fc0011.c 2012-10-22 16:15:46.000000000 +0200 +++ linux/drivers/media/tuners/fc0011.c 2012-10-22 16:17:15.280720317 +0200 @@ -220,6 +220,7 @@ /* Calc XIN. The PLL reference frequency is 18 MHz. */ xdiv = fvco / 18000; + WARN_ON(xdiv > 0xFF); frac = fvco - xdiv * 18000; frac = (frac << 15) / 18000; if (frac >= 16384) @@ -346,6 +347,8 @@ vco_cal &= FC11_VCOCAL_VALUEMASK; switch (vco_sel) { + default: + WARN_ON(1); case 0: if (vco_cal < 8) { regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2); @@ -427,7 +430,8 @@ err = fc0011_writereg(priv, FC11_REG_RCCAL, regs[FC11_REG_RCCAL]); if (err) return err; - err = fc0011_writereg(priv, FC11_REG_16, 0xB); + regs[FC11_REG_16] = 0xB; + err = fc0011_writereg(priv, FC11_REG_16, regs[FC11_REG_16]); if (err) return err; -- Greetings, Michael. PGP: 908D8B0E
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