On 09.04.2012 15:02, Thomas Mair wrote:
thanks for your information. I did get in touch with Realtek and they
provided me with the datasheet for the RTL2832U. So what I will try to
do is write a demodulator driver for the RTL2832 demod chip following
the information of the datasheet and the Realtek driver. I will follow
Antti's RTL2830 driver structure.
For now there is only one question left regarding the testing of the
drivers. What is the best way to test and debug the drivers. Sould I
compile the 3.4 kernel and use it, or is it safer to set up a
structure like the one I already have to test the driver with a stable
kernel?
I vote for cloning Mauro's latest staging Kernel 3.5 and use it.
http://git.linuxtv.org/media_tree.git/shortlog/refs/heads/staging/for_v3.5
I have some old stubbed drivers that just works for one frequency using
combination of RTL2832U + FC2580. Also I have rather well commented USB
sniff from that device. I can sent those if you wish.
As general instruction try following. It is what I usually do and I
think many other Linux developers too.
1) take USB sniffs. SniffUSB 2.0.
http://www.pcausa.com/Utilities/UsbSnoop/
2) parse those sniffs using parser.pl script
3) log is still too big due to video stream, remove it
sed -e 's/BULK\[00081\].*$/BULK\[00081\] MPEG2 TS packet data removed/g'
log.org > log.new
4) now you should have small ~100kB sniff, open it in text editor
5) analyze sniff. find out tuner I2C messages, then demod messages,
usb-controller messages, etc.
6) make python/perl script to generate C-code like write_regs(0xaa,
0x12); copy paste that code to driver skeleton until it starts working
7) implement all correctly callback per callback until you are fine with
code. Most important demod callbacks are .set_frontend() and
.read_status(). Others are not required, I mean .read_snr(),
.read_ber(), .read_ucblocks() and .read_signal_strength(). IIRC RTL2830
.read_status() is similar as RTL2832 and it is already working.
You can copy directly from RTL2830 driver these functions as those are
similar:
rtl2830_wr()
rtl2830_rd()
rtl2830_wr_regs()
rtl2830_rd_regs()
rtl2830_rd_regs() // oops wrong name
rtl2830_rd_reg()
rtl2830_wr_reg_mask()
rtl2830_rd_reg_mask()
Consider also making making routines for access those "virtual"
registers as RTL2830/RTL2832 uses "virtual" bit based registers over
real hardware registers. Some extra work but surely easy many things as
you don't need to play with bits.
Representation can be made like that or make your own model:
#define REGISTER_NAME <reg page(bank)><physical reg><reg bit MSB><reg
bit LSB>
regards
Antti
--
http://palosaari.fi/
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