> I think what might happening is that TS packets are getting chopped, as device seems to want > to align to max packet size. Oh, I also noticed that the Linux driver uses a smaller USB packet count than Windows. Is there any discernible reason for this? Lag on DVB isn't an issue for me and probably everyone else due to the stream going to secondary storage first. Great, I'll try it out later. I have been studying the source code and noticed that the bus locking mechanism is TODOed and may be part of the problem. My symptom is that Tuner A fails when Tuner B is started and I have a theory that somehow the TDA18271 is getting some I2C data and being corrupted because of a gating problem with the I2C signal. The TDA18271 can change the last 2 bits of it's default I2C address by setting a voltage on its AS pin (presumably with resistor dividers) but I haven't delved in to determine if this what Leadtek have done - both tuners might be set to address 0xC0. I can only truly test this by putting CRO probe on and seeing if the I2C is going down the wrong path at the wrong time. I just wish ITE/Afa would release their data sheet to the public and make it as detailed and USEFUL as the TDA18271 data sheet. This obfuscation, need for NDAs and a half arsed data sheet and bloody sniffing Windows USB transactions for programming clues is such a waste of time and I fail to see how it benefits ITE to do this. The Afatech chips are 4+ years old anyway - what's the problem? If anyone wants to send me the data sheets and more importantly the DESIGN MANUAL from the devkit I'd be most grateful. -- To unsubscribe from this list: send the line "unsubscribe linux-media" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
