Hi Jacopo,
Thanks for your work.
On 2025-03-17 12:56:45 +0100, Jacopo Mondi wrote:
> Add formats definition for RAW Bayer formats in vsp1_pipe.c.
>
> 8-bits RAW Bayer pixel formats map on VSP format RGB332.
> 10, 12 and 16 bits RAW Bayer pixel formats map on RGB565 insted.
>
> Signed-off-by: Jacopo Mondi <jacopo.mondi+renesas@xxxxxxxxxxxxxxxx>
> ---
> drivers/media/platform/renesas/vsp1/vsp1_pipe.c | 72 ++++++++++++++++++++++++-
> 1 file changed, 71 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/media/platform/renesas/vsp1/vsp1_pipe.c b/drivers/media/platform/renesas/vsp1/vsp1_pipe.c
> index 8e9be3ec1b4dbdad1cbe35ae3a88952f46e41343..6592513ca833175bdbfe850d61d1b5957ad27e0d 100644
> --- a/drivers/media/platform/renesas/vsp1/vsp1_pipe.c
> +++ b/drivers/media/platform/renesas/vsp1/vsp1_pipe.c
> @@ -30,10 +30,80 @@
> */
>
> static const struct vsp1_format_info vsp1_video_formats[] = {
> - { V4L2_PIX_FMT_RGB332, MEDIA_BUS_FMT_ARGB8888_1X32,
> + /* Raw Bayer 8-bit: Maps on RGB332 */
> + { V4L2_PIX_FMT_SBGGR8, MEDIA_BUS_FMT_Y8_1X8,
> + VI6_FMT_RGB_332, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 8, 0, 0 }, false, false, 1, 1, false },
> + { V4L2_PIX_FMT_SGBRG8, MEDIA_BUS_FMT_Y8_1X8,
> + VI6_FMT_RGB_332, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 8, 0, 0 }, false, false, 1, 1, false },
> + { V4L2_PIX_FMT_SGRBG8, MEDIA_BUS_FMT_Y8_1X8,
> + VI6_FMT_RGB_332, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 8, 0, 0 }, false, false, 1, 1, false },
> + { V4L2_PIX_FMT_SRGGB8, MEDIA_BUS_FMT_Y8_1X8,
> VI6_FMT_RGB_332, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> 1, { 8, 0, 0 }, false, false, 1, 1, false },
> +
> + /* Raw Bayer 10/12/16-bit: Maps on RGB565 */
I have tested this with 10 and 12 bit bayer formats and all of them only
need the VI6_RPF_DSWAP_P_WDS swap bit set. Setting VI6_RPF_DSWAP_P_BTS
do not work.
I have not tested on with 16 bit as the interface I use don't support it
but I suspect this holds true for 16 bit too.
With this fixed for at least 10 and 12,
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@xxxxxxxxxxxx>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@xxxxxxxxxxxx>
> + { V4L2_PIX_FMT_SBGGR10, MEDIA_BUS_FMT_Y10_1X10,
> + VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 10, 0, 0 }, false, false, 1, 1, false },
> + { V4L2_PIX_FMT_SGBRG10, MEDIA_BUS_FMT_Y10_1X10,
> + VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 10, 0, 0 }, false, false, 1, 1, false },
> + { V4L2_PIX_FMT_SGRBG10, MEDIA_BUS_FMT_Y10_1X10,
> + VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 10, 0, 0 }, false, false, 1, 1, false },
> + { V4L2_PIX_FMT_SRGGB10, MEDIA_BUS_FMT_Y10_1X10,
> + VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 10, 0, 0 }, false, false, 1, 1, false },
> +
> + { V4L2_PIX_FMT_SBGGR12, MEDIA_BUS_FMT_Y12_1X12,
> + VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 12, 0, 0 }, false, false, 1, 1, false },
> + { V4L2_PIX_FMT_SGBRG12, MEDIA_BUS_FMT_Y12_1X12,
> + VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 12, 0, 0 }, false, false, 1, 1, false },
> + { V4L2_PIX_FMT_SGRBG12, MEDIA_BUS_FMT_Y12_1X12,
> + VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 12, 0, 0 }, false, false, 1, 1, false },
> + { V4L2_PIX_FMT_SRGGB12, MEDIA_BUS_FMT_Y12_1X12,
> + VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 12, 0, 0 }, false, false, 1, 1, false },
> +
> + { V4L2_PIX_FMT_SBGGR16, MEDIA_BUS_FMT_Y16_1X16,
> + VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 16, 0, 0 }, false, false, 1, 1, false },
> + { V4L2_PIX_FMT_SGBRG16, MEDIA_BUS_FMT_Y16_1X16,
> + VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 16, 0, 0 }, false, false, 1, 1, false },
> + { V4L2_PIX_FMT_SGRBG16, MEDIA_BUS_FMT_Y16_1X16,
> + VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 16, 0, 0 }, false, false, 1, 1, false },
> + { V4L2_PIX_FMT_SRGGB16, MEDIA_BUS_FMT_Y16_1X16,
> + VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 16, 0, 0 }, false, false, 1, 1, false },
> +
> + { V4L2_PIX_FMT_RGB332, MEDIA_BUS_FMT_ARGB8888_1X32,
> + VI6_FMT_RGB_332, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> + VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
> + 1, { 10, 0, 0 }, false, false, 1, 1, false },
> { V4L2_PIX_FMT_ARGB444, MEDIA_BUS_FMT_ARGB8888_1X32,
> VI6_FMT_ARGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
> VI6_RPF_DSWAP_P_WDS,
>
> --
> 2.48.1
>
--
Kind Regards,
Niklas Söderlund
