Hi Dongcheng, On Fri, Mar 07, 2025 at 09:36:30PM +0800, Yan, Dongcheng wrote: > Hi Sakari, > > On 3/7/2025 6:55 PM, Sakari Ailus wrote: > > Hi Dongcheng, > > > > On Fri, Mar 07, 2025 at 06:00:56PM +0800, Yan, Dongcheng wrote: > >>>> + /* MIPI Clock Rate = ByteClock × 4, defined in lt6911uxe spec */ > >>> > >>> What does the byte clock actually signify? Bytes per second on CSI-2? > >>> > >> > >> This is more like a DSI related calculation, I think lontium uses the > >> expression related to HDMI and DSI in the video field. > >> dsi_clk = Bitclk / 2 = Byteclk * 4, dsi_clk is mipi clk, which is used > >> as link_freq. > >> Here Bitclk = HTS * VTS * fps * bpp / lanes. > > > > The PHY for CSI-2 and DSI is the same, so the same formula is applicable. > > The chip is HDMI/CSI-2 (isn'it it?), so I wonder how DSI is related to > > this. How many HDMI lanes are in use? > > > > My expression misunderstood you. I am just explaining why ByteClock is > used here to name. Yes, ByteClock is Bytes per second on CSI-2, and > because CSI-2 uses DDR(Double Data Rate), here link_freq = bitclk / 2 = > ByteClock * 4. Ack, thanks for confirming this. -- Sakari Ailus
