Hi Tommaso,
Thank you for the patch.
On Fri, Feb 21, 2025 at 04:55:16PM +0100, Tommaso Merciai wrote:
> Document the CSI-2 block which is part of CRU found in Renesas RZ/G3E
> SoC.
>
> The CSI-2 block on the RZ/G3E SoC is identical to one found on the
> RZ/V2H(P) SoC.
>
> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@xxxxxxxxxxxxxx>
> ---
> .../devicetree/bindings/media/renesas,rzg2l-csi2.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml b/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml
> index 1d7784e8af16..9b7ed86ef14b 100644
> --- a/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml
> +++ b/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml
> @@ -24,6 +24,9 @@ properties:
> - renesas,r9a07g044-csi2 # RZ/G2{L,LC}
> - renesas,r9a07g054-csi2 # RZ/V2L
> - const: renesas,rzg2l-csi2
> + - items:
> + - const: renesas,r9a09g047-csi2 # RZ/G3E
> + - const: renesas,r9a09g057-csi2
If you follow my suggestion on 01/18, the description of the second
reset entry needs to be updated.
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx>
> - const: renesas,r9a09g057-csi2 # RZ/V2H(P)
>
> reg:
--
Regards,
Laurent Pinchart
