On Thu, Dec 26, 2024 at 01:19:36PM +0530, Jai Luthra wrote: > Switch to different PLL multipliers and FLL/LLP to achieve the same Self NACK here. The new PLL multipliers also mean a different pixel rate, I missed making that change in this patch. On further testing, only updating the minimum LLP from 0xd78 to 0xde8 is what fixes the issue. The change to the PLL multipliers is not really needed. > resolution and framerate while avoiding blocky artefacts seen when using > analog binning with RAW10 format on higher resolutions [1]. > > These new settings match the register sequence generated for > 1640x1232@60fps (2x2 analog binned) RAW10 mode where no artefacts are > present. The same values work for other modes as well. It is unclear > from the datasheet why a higher HBLANK, lower VBLANK and lower PLL > multipliers fix the artefacts seen before. I will send a v5 that does not change the PLL multipliers but only increases the minimum LLP (and decreases vts_def for all modes, so that we still hit 30/60fps) > > [1]: https://github.com/raspberrypi/rpicam-apps/issues/281#issuecomment-1082894118 > > Signed-off-by: Jai Luthra <jai.luthra@xxxxxxxxxxxxxxxx> > --- > drivers/media/i2c/imx219.c | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/drivers/media/i2c/imx219.c b/drivers/media/i2c/imx219.c > index 84681e5da3e238905139fe174e9ee3cfe5fa0246..a8fcb7234c78b888cd7424629ced02cdc55a98fd 100644 > --- a/drivers/media/i2c/imx219.c > +++ b/drivers/media/i2c/imx219.c > @@ -74,7 +74,7 @@ > #define IMX219_FLL_MAX 0xffff > #define IMX219_VBLANK_MIN 32 > #define IMX219_REG_LINE_LENGTH CCI_REG16(0x0162) > -#define IMX219_LLP_MIN 0x0d78 > +#define IMX219_LLP_MIN 0x0de8 > #define IMX219_LLP_MAX 0x7ff0 > > #define IMX219_REG_X_ADD_STA_A CCI_REG16(0x0164) > @@ -171,9 +171,9 @@ static const struct cci_reg_sequence imx219_common_regs[] = { > { IMX219_REG_VTSYCK_DIV, 1 }, > { IMX219_REG_PREPLLCK_VT_DIV, 3 }, /* 0x03 = AUTO set */ > { IMX219_REG_PREPLLCK_OP_DIV, 3 }, /* 0x03 = AUTO set */ > - { IMX219_REG_PLL_VT_MPY, 57 }, > + { IMX219_REG_PLL_VT_MPY, 48 }, > { IMX219_REG_OPSYCK_DIV, 1 }, > - { IMX219_REG_PLL_OP_MPY, 114 }, > + { IMX219_REG_PLL_OP_MPY, 96 }, > > /* Undocumented registers */ > { CCI_REG8(0x455e), 0x00 }, > @@ -287,25 +287,25 @@ static const struct imx219_mode supported_modes[] = { > /* 8MPix 15fps mode */ > .width = 3280, > .height = 2464, > - .vts_def = 3526, > + .vts_def = 2876, > }, > { > /* 1080P 30fps cropped */ > .width = 1920, > .height = 1080, > - .vts_def = 1763, > + .vts_def = 1438, > }, > { > /* 2x2 binned 30fps mode */ > .width = 1640, > .height = 1232, > - .vts_def = 1763, > + .vts_def = 1438, > }, > { > /* 640x480 30fps mode */ > .width = 640, > .height = 480, > - .vts_def = 1763, > + .vts_def = 1438, > }, > }; > > > -- > 2.47.1 >
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