From: Bo Kong <Bo.Kong@xxxxxxxxxxxx>
Add aie node and related node.
Signed-off-by: Bo Kong <Bo.Kong@xxxxxxxxxxxx>
---
Changes in v3:
1. Remove dts non-MMIO nodes
Changes in v2:
1. Add AIE node and related node
---
arch/arm64/boot/dts/mediatek/mt8188.dtsi | 33 ++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
index faccc7f16259..d41f5bea3e65 100644
--- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
@@ -2270,12 +2270,45 @@ imgsys_wpe1: clock-controller@15220000 {
#clock-cells = <1>;
};
+ aie: aie@15310000 {
+ compatible = "mediatek,mt8188-aie";
+ reg = <0 0x15310000 0 0x1000>;
+ interrupts = <GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH 0>;
+ mediatek,larb = <&larb12>;
+ iommus = <&vpp_iommu M4U_PORT_L12_FDVT_RDA_0>,
+ <&vpp_iommu M4U_PORT_L12_FDVT_RDB_0>,
+ <&vpp_iommu M4U_PORT_L12_FDVT_WRA_0>,
+ <&vpp_iommu M4U_PORT_L12_FDVT_WRB_0>;
+ power-domains = <&spm MT8188_POWER_DOMAIN_IPE>;
+ clocks = <&imgsys CLK_IMGSYS_MAIN_IPE>,
+ <&ipesys CLK_IPE_FDVT>,
+ <&ipesys CLK_IPE_SMI_LARB12>,
+ <&ipesys CLK_IPESYS_TOP>;
+ clock-names = "img_ipe",
+ "ipe_fdvt",
+ "ipe_smi_larb12",
+ "ipe_top";
+ };
+
ipesys: clock-controller@15330000 {
compatible = "mediatek,mt8188-ipesys";
reg = <0 0x15330000 0 0x1000>;
#clock-cells = <1>;
};
+ larb12: larb@15340000 {
+ compatible = "mediatek,mt8188-smi-larb";
+ reg = <0 0x15340000 0 0x1000>;
+ mediatek,larb-id = <SMI_L12_ID>;
+ mediatek,smi = <&vpp_smi_common>;
+ mediatek,smi-sub-comm = <&smi_img1>;
+ mediatek,smi-sub-comm-inport = <0>;
+ clocks = <&imgsys CLK_IMGSYS_MAIN_IPE>,
+ <&ipesys CLK_IPE_SMI_LARB12>;
+ clock-names = "apb", "smi";
+ power-domains = <&spm MT8188_POWER_DOMAIN_IPE>;
+ };
+
imgsys_wpe2: clock-controller@15520000 {
compatible = "mediatek,mt8188-imgsys-wpe2";
reg = <0 0x15520000 0 0x1000>;
--
2.45.2
