Following addition of cascaded s_stream call within mipid02_stream_enable and mipid02_stream_disable, the mipid02_stream_enable error handling must be fixed to simply disable the clocks & data lanes without also calling again the s_stream of the source subdev. Moreover, main control registers are reset to 0 for all cases of error within the mipid02_stream_enable even if they haven't yet been written. Correct this behavior by simply returning an error when register clear are not necessary. Signed-off-by: Alain Volmat <alain.volmat@xxxxxxxxxxx> --- drivers/media/i2c/st-mipid02.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/media/i2c/st-mipid02.c b/drivers/media/i2c/st-mipid02.c index b947a55281f0..bc637a651a22 100644 --- a/drivers/media/i2c/st-mipid02.c +++ b/drivers/media/i2c/st-mipid02.c @@ -480,7 +480,7 @@ static int mipid02_stream_enable(struct mipid02_dev *bridge) int ret = -EINVAL; if (!bridge->s_subdev) - goto error; + return ret; memset(&bridge->r, 0, sizeof(bridge->r)); @@ -490,13 +490,13 @@ static int mipid02_stream_enable(struct mipid02_dev *bridge) /* build registers content */ ret = mipid02_configure_from_rx(bridge, fmt); if (ret) - goto error; + return ret; ret = mipid02_configure_from_tx(bridge); if (ret) - goto error; + return ret; ret = mipid02_configure_from_code(bridge, fmt); if (ret) - goto error; + return ret; v4l2_subdev_unlock_state(state); @@ -531,8 +531,10 @@ static int mipid02_stream_enable(struct mipid02_dev *bridge) return 0; error: + cci_write(bridge->regmap, MIPID02_CLK_LANE_REG1, 0, &ret); + cci_write(bridge->regmap, MIPID02_DATA_LANE0_REG1, 0, &ret); + cci_write(bridge->regmap, MIPID02_DATA_LANE1_REG1, 0, &ret); dev_err(&client->dev, "failed to stream on %d", ret); - mipid02_stream_disable(bridge); return ret; } -- 2.25.1
