From: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx> It is common practice in the downstream and upstream CCI dt to set CCI clock rates to 19.2 MHz. It appears to be fairly common for initial code to set the CCI clock rate to 37.5 MHz. Applying the widely used CCI clock rates from downstream ought not to cause warning messages in the upstream kernel where our general policy is to usually copy downstream hardware clock rates across the range of Qualcomm drivers. Drop the warning it is pervasive across CAMSS users but doesn't add any information or warrant any changes to the DT to align the DT clock rate to the bootloader clock rate. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@xxxxxxxxxx> Link: https://lore.kernel.org/linux-arm-msm/20240824115900.40702-1-bryan.odonoghue@xxxxxxxxxx Signed-off-by: Richard Acayan <mailingradian@xxxxxxxxx> --- drivers/i2c/busses/i2c-qcom-cci.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-cci.c b/drivers/i2c/busses/i2c-qcom-cci.c index 414882c57d7f..99e4305a3373 100644 --- a/drivers/i2c/busses/i2c-qcom-cci.c +++ b/drivers/i2c/busses/i2c-qcom-cci.c @@ -602,14 +602,6 @@ static int cci_probe(struct platform_device *pdev) } } - if (cci_clk_rate != cci->data->cci_clk_rate) { - /* cci clock set by the bootloader or via assigned clock rate - * in DT. - */ - dev_warn(dev, "Found %lu cci clk rate while %lu was expected\n", - cci_clk_rate, cci->data->cci_clk_rate); - } - ret = cci_enable_clocks(cci); if (ret < 0) return ret; -- 2.46.0
