Hi Niklas,
Thank you for the patch.
On Thu, Jul 04, 2024 at 06:16:16PM +0200, Niklas Söderlund wrote:
> To make it easier to support new Gen4 SoCs a family fallback compatible
> similar to what is used for Gen2 have been added to the VIN bindings.
s/have been/has been/
> Add this fallback to the V4H DTSI.
>
> There is no functional change, but the addition of the family fallback
> in the bindings produces warnings for V4H for DTS checks if they are not
> added.
>
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@xxxxxxxxxxxx>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx>
> ---
> * Changes since v3
> - New in v4.
> ---
> arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 48 +++++++++++++++--------
> 1 file changed, 32 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
> index c5fc414928c9..9e75b3f4d317 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
> @@ -1189,7 +1189,8 @@ msiof5: spi@e6c28000 {
> };
>
> vin00: video@e6ef0000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef0000 0 0x1000>;
> interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 730>;
> @@ -1217,7 +1218,8 @@ vin00isp0: endpoint@0 {
> };
>
> vin01: video@e6ef1000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef1000 0 0x1000>;
> interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 731>;
> @@ -1245,7 +1247,8 @@ vin01isp0: endpoint@0 {
> };
>
> vin02: video@e6ef2000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef2000 0 0x1000>;
> interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 800>;
> @@ -1273,7 +1276,8 @@ vin02isp0: endpoint@0 {
> };
>
> vin03: video@e6ef3000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef3000 0 0x1000>;
> interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 801>;
> @@ -1301,7 +1305,8 @@ vin03isp0: endpoint@0 {
> };
>
> vin04: video@e6ef4000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef4000 0 0x1000>;
> interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 802>;
> @@ -1329,7 +1334,8 @@ vin04isp0: endpoint@0 {
> };
>
> vin05: video@e6ef5000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef5000 0 0x1000>;
> interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 803>;
> @@ -1357,7 +1363,8 @@ vin05isp0: endpoint@0 {
> };
>
> vin06: video@e6ef6000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef6000 0 0x1000>;
> interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 804>;
> @@ -1385,7 +1392,8 @@ vin06isp0: endpoint@0 {
> };
>
> vin07: video@e6ef7000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef7000 0 0x1000>;
> interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 805>;
> @@ -1413,7 +1421,8 @@ vin07isp0: endpoint@0 {
> };
>
> vin08: video@e6ef8000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef8000 0 0x1000>;
> interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 806>;
> @@ -1441,7 +1450,8 @@ vin08isp1: endpoint@1 {
> };
>
> vin09: video@e6ef9000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6ef9000 0 0x1000>;
> interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 807>;
> @@ -1469,7 +1479,8 @@ vin09isp1: endpoint@1 {
> };
>
> vin10: video@e6efa000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6efa000 0 0x1000>;
> interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 808>;
> @@ -1497,7 +1508,8 @@ vin10isp1: endpoint@1 {
> };
>
> vin11: video@e6efb000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6efb000 0 0x1000>;
> interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 809>;
> @@ -1525,7 +1537,8 @@ vin11isp1: endpoint@1 {
> };
>
> vin12: video@e6efc000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6efc000 0 0x1000>;
> interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 810>;
> @@ -1553,7 +1566,8 @@ vin12isp1: endpoint@1 {
> };
>
> vin13: video@e6efd000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6efd000 0 0x1000>;
> interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 811>;
> @@ -1581,7 +1595,8 @@ vin13isp1: endpoint@1 {
> };
>
> vin14: video@e6efe000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6efe000 0 0x1000>;
> interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 812>;
> @@ -1609,7 +1624,8 @@ vin14isp1: endpoint@1 {
> };
>
> vin15: video@e6eff000 {
> - compatible = "renesas,vin-r8a779g0";
> + compatible = "renesas,vin-r8a779g0",
> + "renesas,rcar-gen4-vin";
> reg = <0 0xe6eff000 0 0x1000>;
> interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpg CPG_MOD 813>;
--
Regards,
Laurent Pinchart
