Re: [PATCH 2/2] media: dt-bindings: renesas,vsp1: add top-level constraints

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Hi Krzysztof,

Thank you for the patch.

On Sun, Aug 18, 2024 at 07:29:37PM +0200, Krzysztof Kozlowski wrote:
> Properties with variable number of items per each device are expected to
> have widest constraints in top-level "properties:" block and further
> customized (narrowed) in "if:then:".  Add missing top-level constraints
> for clocks and clock-names.

Same comments here as for patch 1/2.

> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
> ---
>  .../devicetree/bindings/media/renesas,vsp1.yaml  | 16 +++++++++-------
>  1 file changed, 9 insertions(+), 7 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml
> index 3265e922647c..94c0ab9a5be2 100644
> --- a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml
> +++ b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml
> @@ -32,8 +32,15 @@ properties:
>    interrupts:
>      maxItems: 1
>  
> -  clocks: true
> -  clock-names: true
> +  clocks:
> +    minItems: 1
> +    maxItems: 3
> +
> +  clock-names:
> +    items:
> +      - const: aclk
> +      - const: pclk
> +      - const: vclk
>  
>    power-domains:
>      maxItems: 1
> @@ -81,11 +88,6 @@ allOf:
>              - description: Main clock
>              - description: Register access clock
>              - description: Video clock
> -        clock-names:
> -          items:
> -            - const: aclk
> -            - const: pclk
> -            - const: vclk
>        required:
>          - clock-names
>      else:

-- 
Regards,

Laurent Pinchart




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