Il 01/08/24 05:10, Jianhua Lin ha scritto:
the iommu HW supported 34bits iova space(16GB),
but mediatek jpeg enc/dec driver still is 32bit,
then need to set the bit32/bit33 iova to jpeg HW.
Signed-off-by: Jianhua Lin <jianhua.lin@xxxxxxxxxxxx>
---
Changes compared with v3:
- remove of_property_read_bool() for 34bit supporting check.
- move the support_34bit into the platform data(mtk_jpeg_variant)
for the specific SoC supporting.
- add mtk8188 SoC to compatible list.
.../platform/mediatek/jpeg/mtk_jpeg_core.c | 55 ++++++++++++++++-
.../platform/mediatek/jpeg/mtk_jpeg_core.h | 4 ++
.../platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 59 +++++++++++++++----
.../platform/mediatek/jpeg/mtk_jpeg_dec_hw.h | 1 +
.../platform/mediatek/jpeg/mtk_jpeg_dec_reg.h | 8 +++
.../platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 44 ++++++++++++--
.../platform/mediatek/jpeg/mtk_jpeg_enc_hw.h | 7 ++-
7 files changed, 158 insertions(+), 20 deletions(-)
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index ac48658e2de4..101c509ab2ab 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
..snip..
@@ -1860,6 +1863,10 @@ static struct clk_bulk_data mtk_jpeg_clocks[] = {
{ .id = "jpgenc" },
};
+static struct clk_bulk_data mtk_jpeg_dec_clocks[] = {
+ { .id = "jpgdec" },
+};
+
static struct clk_bulk_data mt8173_jpeg_dec_clocks[] = {
{ .id = "jpgdec-smi" },
{ .id = "jpgdec" },
@@ -1878,6 +1885,7 @@ static const struct mtk_jpeg_variant mt8173_jpeg_drvdata = {
.ioctl_ops = &mtk_jpeg_dec_ioctl_ops,
.out_q_default_fourcc = V4L2_PIX_FMT_JPEG,
.cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M,
+ .support_34bit = false,
You don't need to set this to false, as the default value is already 0 (false).
Please remove all instances of `.support_34bit = false`, and keep only the true
assignments, after which, and *only after*, on your v5:
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
};
static const struct mtk_jpeg_variant mtk_jpeg_drvdata = {
@@ -1894,6 +1902,7 @@ static const struct mtk_jpeg_variant mtk_jpeg_drvdata = {
.out_q_default_fourcc = V4L2_PIX_FMT_YUYV,
.cap_q_default_fourcc = V4L2_PIX_FMT_JPEG,
.multi_core = false,
+ .support_34bit = false,
};
static struct mtk_jpeg_variant mtk8195_jpegenc_drvdata = {
@@ -1907,6 +1916,7 @@ static struct mtk_jpeg_variant mtk8195_jpegenc_drvdata = {
.cap_q_default_fourcc = V4L2_PIX_FMT_JPEG,
.multi_core = true,
.jpeg_worker = mtk_jpegenc_worker,
+ .support_34bit = false,
};
static const struct mtk_jpeg_variant mtk8195_jpegdec_drvdata = {
@@ -1920,6 +1930,41 @@ static const struct mtk_jpeg_variant mtk8195_jpegdec_drvdata = {
.cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M,
.multi_core = true,
.jpeg_worker = mtk_jpegdec_worker,
+ .support_34bit = false,
+};
+
+static const struct mtk_jpeg_variant mtk8188_jpegenc_drvdata = {
+ .clks = mtk_jpeg_clocks,
+ .num_clks = ARRAY_SIZE(mtk_jpeg_clocks),
+ .formats = mtk_jpeg_enc_formats,
+ .num_formats = MTK_JPEG_ENC_NUM_FORMATS,
+ .qops = &mtk_jpeg_enc_qops,
+ .irq_handler = mtk_jpeg_enc_irq,
+ .hw_reset = mtk_jpeg_enc_reset,
+ .m2m_ops = &mtk_jpeg_enc_m2m_ops,
+ .dev_name = "mtk-jpeg-enc",
+ .ioctl_ops = &mtk_jpeg_enc_ioctl_ops,
+ .out_q_default_fourcc = V4L2_PIX_FMT_YUYV,
+ .cap_q_default_fourcc = V4L2_PIX_FMT_JPEG,
+ .multi_core = false,
+ .support_34bit = true,
+};
+
+static const struct mtk_jpeg_variant mtk8188_jpegdec_drvdata = {
+ .clks = mtk_jpeg_dec_clocks,
+ .num_clks = ARRAY_SIZE(mtk_jpeg_dec_clocks),
+ .formats = mtk_jpeg_dec_formats,
+ .num_formats = MTK_JPEG_DEC_NUM_FORMATS,
+ .qops = &mtk_jpeg_dec_qops,
+ .irq_handler = mtk_jpeg_dec_irq,
+ .hw_reset = mtk_jpeg_dec_reset,
+ .m2m_ops = &mtk_jpeg_dec_m2m_ops,
+ .dev_name = "mtk-jpeg-dec",
+ .ioctl_ops = &mtk_jpeg_dec_ioctl_ops,
+ .out_q_default_fourcc = V4L2_PIX_FMT_JPEG,
+ .cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M,
+ .multi_core = false,
+ .support_34bit = true,
};
