On 7/24/24 6:08 PM, Nicolas Dufresne wrote:
Hi Marek,
Hi,
Le mercredi 24 juillet 2024 à 02:19 +0200, Marek Vasut a écrit :
Introduce dedicated memory-to-memory IPUv3 VDI deinterlacer driver.
Currently the IPUv3 can operate VDI in DIRECT mode, from sensor to
memory. This only works for single stream, that is, one input from
one camera is deinterlaced on the fly with a helper buffer in DRAM
and the result is written into memory.
The i.MX6Q/QP does support up to four analog cameras via two IPUv3
instances, each containing one VDI deinterlacer block. In order to
deinterlace all four streams from all four analog cameras live, it
is necessary to operate VDI in INDIRECT mode, where the interlaced
streams are written to buffers in memory, and then deinterlaced in
memory using VDI in INDIRECT memory-to-memory mode.
Just a quick design question. Is it possible to chain the deinterlacer and the
csc-scaler ?
I think you could do that.
If so, it would be much more efficient if all this could be
combined into the existing m2m driver, since you could save a memory rountrip
when needing to deinterlace, change the colorspace and possibly scale too.
The existing PRP/IC driver is similar to what this driver does, yes, but
it uses a different DMA path , I believe it is IDMAC->PRP->IC->IDMAC .
This driver uses IDMAC->VDI->IC->IDMAC . I am not convinced mixing the
two paths into a single driver would be beneficial, but I am reasonably
sure it would be very convoluted. Instead, this driver could be extended
to do deinterlacing and scaling using the IC if that was needed. I think
that would be the cleaner approach.
