Instead of reading device_fw reg as multiple regs let's read the entire
64bit reg using one i2c read and use bit masks and bit shifts to get fw
info.
Signed-off-by: Tommaso Merciai <tomm.merciai@xxxxxxxxx>
---
Changes since v1:
- Use bit masks and bit shifts instead of struct as suggested by SAilus
drivers/media/i2c/alvium-csi2.c | 23 ++++++++++++-----------
drivers/media/i2c/alvium-csi2.h | 14 ++++++++++----
2 files changed, 22 insertions(+), 15 deletions(-)
diff --git a/drivers/media/i2c/alvium-csi2.c b/drivers/media/i2c/alvium-csi2.c
index e65702e3f73e..7a38c424ea48 100644
--- a/drivers/media/i2c/alvium-csi2.c
+++ b/drivers/media/i2c/alvium-csi2.c
@@ -403,21 +403,22 @@ static int alvium_get_bcrm_vers(struct alvium_dev *alvium)
static int alvium_get_fw_version(struct alvium_dev *alvium)
{
struct device *dev = &alvium->i2c_client->dev;
- u64 spec, maj, min, pat;
- int ret = 0;
+ u64 val;
+ int ret;
- ret = alvium_read(alvium, REG_BCRM_DEVICE_FW_SPEC_VERSION_R,
- &spec, &ret);
- ret = alvium_read(alvium, REG_BCRM_DEVICE_FW_MAJOR_VERSION_R,
- &maj, &ret);
- ret = alvium_read(alvium, REG_BCRM_DEVICE_FW_MINOR_VERSION_R,
- &min, &ret);
- ret = alvium_read(alvium, REG_BCRM_DEVICE_FW_PATCH_VERSION_R,
- &pat, &ret);
+ ret = alvium_read(alvium, REG_BCRM_DEVICE_FW, &val, NULL);
if (ret)
return ret;
- dev_info(dev, "fw version: %llu.%llu.%llu.%llu\n", spec, maj, min, pat);
+ dev_info(dev, "fw version: %02u.%02u.%04u.%08x\n",
+ (u8)((val & BCRM_DEVICE_FW_SPEC_MASK) >>
+ BCRM_DEVICE_FW_SPEC_SHIFT),
+ (u8)((val & BCRM_DEVICE_FW_MAJOR_MASK) >>
+ BCRM_DEVICE_FW_MAJOR_SHIFT),
+ (u16)((val & BCRM_DEVICE_FW_MINOR_MASK) >>
+ BCRM_DEVICE_FW_MINOR_SHIFT),
+ (u32)((val & BCRM_DEVICE_FW_PATCH_MASK) >>
+ BCRM_DEVICE_FW_PATCH_SHIFT));
return 0;
}
diff --git a/drivers/media/i2c/alvium-csi2.h b/drivers/media/i2c/alvium-csi2.h
index 9463f8604fbc..ed712ad44899 100644
--- a/drivers/media/i2c/alvium-csi2.h
+++ b/drivers/media/i2c/alvium-csi2.h
@@ -31,10 +31,7 @@
#define REG_BCRM_REG_ADDR_R CCI_REG16(0x0014)
#define REG_BCRM_FEATURE_INQUIRY_R REG_BCRM_V4L2_64BIT(0x0008)
-#define REG_BCRM_DEVICE_FW_SPEC_VERSION_R REG_BCRM_V4L2_8BIT(0x0010)
-#define REG_BCRM_DEVICE_FW_MAJOR_VERSION_R REG_BCRM_V4L2_8BIT(0x0011)
-#define REG_BCRM_DEVICE_FW_MINOR_VERSION_R REG_BCRM_V4L2_16BIT(0x0012)
-#define REG_BCRM_DEVICE_FW_PATCH_VERSION_R REG_BCRM_V4L2_32BIT(0x0014)
+#define REG_BCRM_DEVICE_FW REG_BCRM_V4L2_64BIT(0x0010)
#define REG_BCRM_WRITE_HANDSHAKE_RW REG_BCRM_V4L2_8BIT(0x0018)
/* Streaming Control Registers */
@@ -205,6 +202,15 @@
#define ALVIUM_LP2HS_DELAY_MS 100
+#define BCRM_DEVICE_FW_MAJOR_MASK GENMASK_ULL(15, 8)
+#define BCRM_DEVICE_FW_MAJOR_SHIFT 8
+#define BCRM_DEVICE_FW_MINOR_MASK GENMASK_ULL(31, 16)
+#define BCRM_DEVICE_FW_MINOR_SHIFT 16
+#define BCRM_DEVICE_FW_PATCH_MASK GENMASK_ULL(63, 32)
+#define BCRM_DEVICE_FW_PATCH_SHIFT 32
+#define BCRM_DEVICE_FW_SPEC_MASK GENMASK_ULL(7, 0)
+#define BCRM_DEVICE_FW_SPEC_SHIFT 0
+
enum alvium_bcrm_mode {
ALVIUM_BCM_MODE,
ALVIUM_GENCP_MODE,
--
2.34.1
