Hi Dongcheng,
A few more comments below...
On Mon, Apr 29, 2024 at 01:13:33PM +0800, Dongcheng Yan wrote:
> +/* Analog gain control */
> +#define AR0234_REG_ANALOG_GAIN CCI_REG16(0x3060)
> +#define AR0234_ANAL_GAIN_MIN 0
> +#define AR0234_ANAL_GAIN_MAX 0x7f
> +#define AR0234_ANAL_GAIN_STEP 1
> +#define AR0234_ANAL_GAIN_DEFAULT 0xe
Please use the same prefix here as for the register, apart from REG_ part.
I.e. AR0234_ANALOG_.
> +
> +/* Digital gain control */
> +#define AR0234_REG_GLOBAL_GAIN CCI_REG16(0x305e)
> +#define AR0234_DGTL_GAIN_MIN 0
> +#define AR0234_DGTL_GAIN_MAX 0x7ff
> +#define AR0234_DGTL_GAIN_STEP 1
> +#define AR0234_DGTL_GAIN_DEFAULT 0x80
Ditto.
...
> +static const struct cci_reg_sequence mode_1280x960_10bit_2lane[] = {
> + { CCI_REG16(0x3f4c), 0x121f },
> + { CCI_REG16(0x3f4e), 0x121f },
> + { CCI_REG16(0x3f50), 0x0b81 },
> + { CCI_REG16(0x31e0), 0x0003 },
> + { CCI_REG16(0x30b0), 0x0028 },
> + /* R0X3088 specify the sequencer RAM access address. */
s/0\KX/x/
Same elsewhere.
> + { CCI_REG16(0x3088), 0x8000 },
> + /* R0X3086 write the sequencer RAM. */
--
Regards,
Sakari Ailus
