Initial support for Wave515 multi-decoder IP among other refinements. This was tested on FPGA prototype, so wave5_dt_ids[] was not expanded. ChangeLog: v1: https://lore.kernel.org/linux-media/20240318144225.30835-1-brnkv.i1@xxxxxxxxx/ v2: * drop patch "dt-bindings: media: cnm,wave521c: drop resets restriction" The only user of Wave5 in mainline is TI K3 boards, thus there is no real need to alter dt-bindings * in patch "media: chips-media: wave5: support decoding HEVC Main10 profile" add check for flag "support_hevc10bit_dec" * in patch "media: chips-media: wave5: support reset lines" move reset_control_deassert() out of else branch, add reset_control_assert() to probe error path. * rework patch "media: chips-media: wave5: drop "sram-size" DT prop" - don't move alloc/free form device open/close - intead of exact configuration of reserved SRAM memory in DT and allocating all of it, allocate all available SRAM memory up to WAVE5_MAX_SRAM_SIZE from whatever pool provided. * adjust patch "media: chips-media: wave5: support Wave515 decoder" according to changes in patches "media: chips-media: wave5: support decoding HEVC Main10 profile" and "media: chips-media: wave5: drop "sram-size" DT prop" Ivan Bornyakov (5): media: chips-media: wave5: support decoding HEVC Main10 profile media: chips-media: wave5: support reset lines media: chips-media: wave5: separate irq setup routine media: chips-media: wave5: drop "sram-size" DT prop media: chips-media: wave5: support Wave515 decoder .../platform/chips-media/wave5/wave5-helper.c | 3 +- .../platform/chips-media/wave5/wave5-hw.c | 296 +++++++++++++----- .../chips-media/wave5/wave5-regdefine.h | 5 + .../platform/chips-media/wave5/wave5-vdi.c | 27 +- .../chips-media/wave5/wave5-vpu-dec.c | 44 ++- .../platform/chips-media/wave5/wave5-vpu.c | 31 +- .../platform/chips-media/wave5/wave5-vpuapi.h | 4 +- .../chips-media/wave5/wave5-vpuconfig.h | 11 +- .../media/platform/chips-media/wave5/wave5.h | 1 + 9 files changed, 303 insertions(+), 119 deletions(-) -- 2.44.0
