Hi, Julien:
On Wed, 2024-01-10 at 15:14 +0100, Julien Stephan wrote:
>
> External email : Please do not click links or open attachments until
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> From: Phi-bang Nguyen <pnguyen@xxxxxxxxxxxx>
>
> This driver provides a path to bypass the SoC ISP so that image data
> coming from the SENINF can go directly into memory without any image
> processing. This allows the use of an external ISP.
>
> Signed-off-by: Phi-bang Nguyen <pnguyen@xxxxxxxxxxxx>
> Signed-off-by: Florian Sylvestre <fsylvestre@xxxxxxxxxxxx>
> [Paul Elder fix irq locking]
> Signed-off-by: Paul Elder <paul.elder@xxxxxxxxxxxxxxxx>
> Co-developed-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
> Co-developed-by: Julien Stephan <jstephan@xxxxxxxxxxxx>
> Signed-off-by: Julien Stephan <jstephan@xxxxxxxxxxxx>
> ---
[snip]
> +static void mtk_camsv30_setup(struct mtk_cam_dev *cam_dev, u32 w,
> u32 h,
> + u32 bpl, u32 mbus_fmt)
> +{
> + const struct mtk_cam_conf *conf = cam_dev->conf;
> + u32 int_en = INT_ST_MASK_CAMSV;
> + u32 tmp;
> + struct mtk_cam_sparams sparams;
> +
> + fmt_to_sparams(mbus_fmt, &sparams);
> +
> + if (pm_runtime_resume_and_get(cam_dev->dev) < 0) {
> + dev_err(cam_dev->dev, "failed to get pm_runtime\n");
> + return;
> + }
> +
> + spin_lock_irq(&cam_dev->irqlock);
I think you should setup hardware when hardware is idle. So this
spinlock is redundant.
Regards,
CK
> +
> + writel(conf->tg_sen_mode, cam_dev->regs_tg +
> CAMSV_TG_SEN_MODE);
> +
> + writel((w * sparams.w_factor) << 16U, cam_dev->regs_tg +
> CAMSV_TG_SEN_GRAB_PXL);
> +
> + writel(h << 16U, cam_dev->regs_tg + CAMSV_TG_SEN_GRAB_LIN);
> +
> + /* YUV_U2S_DIS: disable YUV sensor unsigned to signed */
> + writel(0x1000U, cam_dev->regs_tg + CAMSV_TG_PATH_CFG);
> +
> + /* Reset cam */
> + writel(CAMSV_SW_RST, cam_dev->regs + CAMSV_SW_CTL);
> + writel(0x0U, cam_dev->regs + CAMSV_SW_CTL);
> + writel(CAMSV_IMGO_RST_TRIG, cam_dev->regs + CAMSV_SW_CTL);
> +
> + readl_poll_timeout_atomic(cam_dev->regs + CAMSV_SW_CTL, tmp,
> + (tmp == (CAMSV_IMGO_RST_TRIG |
> CAMSV_IMGO_RST_ST)), 10, 200);
> +
> + writel(0x0U, cam_dev->regs + CAMSV_SW_CTL);
> +
> + writel(int_en, cam_dev->regs + CAMSV_INT_EN);
> +
> + writel(conf->module_en | sparams.module_en_pak,
> + cam_dev->regs + CAMSV_MODULE_EN);
> + writel(sparams.fmt_sel, cam_dev->regs + CAMSV_FMT_SEL);
> + writel(sparams.pak, cam_dev->regs + CAMSV_PAK);
> +
> + writel(bpl - 1U, cam_dev->regs_img0 + CAMSV_IMGO_SV_XSIZE);
> + writel(h - 1U, cam_dev->regs_img0 + CAMSV_IMGO_SV_YSIZE);
> +
> + writel(sparams.imgo_stride | bpl, cam_dev->regs_img0 +
> CAMSV_IMGO_SV_STRIDE);
> +
> + writel(conf->imgo_con, cam_dev->regs_img0 + CAMSV_IMGO_SV_CON);
> + writel(conf->imgo_con2, cam_dev->regs_img0 +
> CAMSV_IMGO_SV_CON2);
> +
> + /* CMOS_EN first */
> + writel(readl(cam_dev->regs_tg + CAMSV_TG_SEN_MODE) |
> CAMSV_TG_SEN_MODE_CMOS_EN,
> + cam_dev->regs_tg + CAMSV_TG_SEN_MODE);
> +
> + /* finally, CAMSV_MODULE_EN : IMGO_EN */
> + writel(readl(cam_dev->regs + CAMSV_MODULE_EN) |
> CAMSV_MODULE_EN_IMGO_EN,
> + cam_dev->regs + CAMSV_MODULE_EN);
> +
> + spin_unlock_irq(&cam_dev->irqlock);
> + pm_runtime_put_autosuspend(cam_dev->dev);
> +}
> +
