Hi Umang, On Wed, Jan 31, 2024 at 11:22:06AM +0530, Umang Jain wrote: > Support link frequency of 445MHz in addition to 594MHz. > Break out the register set specific to each data lane rate and also add > the general timing register set corresponding to the each data > lane rate. > > Signed-off-by: Umang Jain <umang.jain@xxxxxxxxxxxxxxxx> Please use the same subject line prefix (i.e. without "i2c: "). -- Regards, Sakari Ailus
