Currently clk_disable() is not synchronous. Consumers just gate the clock, but it doesn't check actually the clock is gated. On RZ/G2L SMARC EVK before starting link reception we need to make sure the video clock is off, then start reception and turn video clock back to on. Introduce clk_disable_unprepare_sync() to synchronize the clock gate operation. Note: patch#3 depend upon [1] [1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20240130164115.116613-5-biju.das.jz@xxxxxxxxxxxxxx/ Biju Das (3): clk: Add clk_disable_unprepare_sync() clk: renesas: rzg2l: Add disable_sync() callback media: platform: rzg2l-cru: rzg2l-video: Use clk_disable_unprepare_sync() drivers/clk/clk.c | 36 ++++++++++++++----- drivers/clk/renesas/rzg2l-cpg.c | 23 ++++++++++++ .../platform/renesas/rzg2l-cru/rzg2l-csi2.c | 2 +- include/linux/clk-provider.h | 4 +++ include/linux/clk.h | 25 +++++++++++++ 5 files changed, 80 insertions(+), 10 deletions(-) -- 2.25.1
