Hi Bastian, On Wednesday 03 November 2010 14:26:26 Bastian Hecht wrote: > 2010/11/3 Michael Jones <michael.jones@xxxxxxxxxxxxxxxx>: > > Bastian Hecht wrote: > >> I enabled isr debugging (#define ISP_ISR_DEBUG) and see that only 1 > >> HS_VS_event is generated per second. 1fps corresponds to my clocking, > >> so 1 vs per second is fine. But shouldn't I see about 2000 hs > >> interrupts there too? HS_VS_IRQ is described as "HS or VS synchro > >> event". > > > > HS_VS_IRQ is _either_ VS _or_ HS interrupts, but not both. The > > SYNC_DETECT bits in ISP_CTRL determines which. For writing into memory, > > the ISP only needs to react per frame, not per line, so it is set up to > > trigger on VS. > > OK, I see, thank you. Is there a point in the ccdc code where I can > directly look up what is read from the camera pins cam_d*? All the > signals seem to be fine from the camera, I want to check if this is > true and the problem is in the dma part. No, the signals are not accessible directly in the ISP. What you could do, however, is read them as GPIOs. -- Regards, Laurent Pinchart -- To unsubscribe from this list: send the line "unsubscribe linux-media" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
