On 12/14/23 12:50, AngeloGioacchino Del Regno wrote: > Il 14/12/23 11:44, AngeloGioacchino Del Regno ha scritto: >> Il 13/12/23 13:20, Eugen Hristev ha scritto: >>> From: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx> >>> >>> Add video encoder node. >>> >>> Signed-off-by: Kyrie Wu <kyrie.wu@xxxxxxxxxxxx> >>> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@xxxxxxxxxxxx> >>> Reviewed-by: Hsin-Yi Wang <hsinyi@xxxxxxxxxxxx> >>> [eugen.hristev@xxxxxxxxxxxxx: minor cleanup] >>> Signed-off-by: Eugen Hristev <eugen.hristev@xxxxxxxxxxxxx> >>> --- >>> arch/arm64/boot/dts/mediatek/mt8186.dtsi | 24 ++++++++++++++++++++++++ >>> 1 file changed, 24 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi >>> b/arch/arm64/boot/dts/mediatek/mt8186.dtsi >>> index 66ead3f23336..8535ff2b44e9 100644 >>> --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi >>> +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi >>> @@ -1993,6 +1993,30 @@ larb7: smi@17010000 { >>> power-domains = <&spm MT8186_POWER_DOMAIN_VENC>; >>> }; >>> + venc: venc@17020000 { >>> + compatible = "mediatek,mt8183-vcodec-enc"; > > Sorry for the double email; > > I've just noticed: where's mediatek,mt8186-vcodec-enc? :-) Hi, There is none. This just works exactly as mt8183, thus reusing the same compatible. Do you want a new dedicated mt8186 compatible as well for the situation *just in case* some specific difference showing up later ? Eugen > >>> + #address-cells = <2>; >>> + #size-cells = <2>; >>> + reg = <0 0x17020000 0 0x2000>; >>> + interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH 0>; >>> + iommus = <&iommu_mm IOMMU_PORT_L7_VENC_RCPU>, >>> + <&iommu_mm IOMMU_PORT_L7_VENC_REC>, >>> + <&iommu_mm IOMMU_PORT_L7_VENC_BSDMA>, >>> + <&iommu_mm IOMMU_PORT_L7_VENC_SV_COMV>, >>> + <&iommu_mm IOMMU_PORT_L7_VENC_RD_COMV>, >>> + <&iommu_mm IOMMU_PORT_L7_VENC_CUR_LUMA>, >>> + <&iommu_mm IOMMU_PORT_L7_VENC_CUR_CHROMA>, >>> + <&iommu_mm IOMMU_PORT_L7_VENC_REF_LUMA>, >>> + <&iommu_mm IOMMU_PORT_L7_VENC_REF_CHROMA>; >>> + dma-ranges = <0x1 0x0 0x1 0x0 0x1 0x0>; >>> + mediatek,scp = <&scp>; >>> + clocks = <&vencsys CLK_VENC_CKE1_VENC>; >>> + clock-names = "MT_CG_VENC"; >> >> clock-names = "venc"; (please no underscores and please lower case) >> >>> + assigned-clocks = <&topckgen CLK_TOP_VENC>; >>> + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D3>; >>> + power-domains = <&spm MT8186_POWER_DOMAIN_VENC>; >>> + }; >> >> >> ....also: >> >> The following order of properties in device nodes is preferred: >> >> 1. "compatible" >> 2. "reg" >> 3. "ranges" >> 4. Standard/common properties (defined by common bindings, e.g. without >> vendor-prefixes) >> 5. Vendor-specific properties >> 6. "status" (if applicable) >> 7. Child nodes, where each node is preceded with a blank line >> >> Documentation/devicetree/bindings/dts-coding-style.rst >> >> Please reorder as per the DTS coding style document, and also please rename the >> venc node to use a generic name, such as "video-encoder@xxxx" >> >> Cheers, >> Angelo > > > _______________________________________________ > Kernel mailing list -- kernel@xxxxxxxxxxxxxxxxxxxxx > To unsubscribe send an email to kernel-leave@xxxxxxxxxxxxxxxxxxxxx