Hi Alexander,
On Thu, Dec 07, 2023 at 03:15:10PM +0100, Alexander Stein wrote:
> Am Donnerstag, 7. Dezember 2023, 14:55:39 CET schrieb Laurent Pinchart:
> > On Thu, Dec 07, 2023 at 12:09:18PM +0100, Alexander Stein wrote:
> > > The extended address registers are missing in the debug output register
> > > list. These are only available on 36-Bit DMA platforms. Due to the
> > > prolonged name, the output width has to be adjusted as well.
> > >
> > > Signed-off-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx>
> > > ---
> > > Changes in v2:
> > > * Split register set into regular and 36-Bit DMA only
> > > * Adjust output width to address longer register names
> > >
> > > Currently only tested on TQMa8MPxL (imx8mp-tqma8mpql-mba8mpxl.dts)
> > >
> > > .../platform/nxp/imx8-isi/imx8-isi-debug.c | 28 +++++++++++++++++--
> > > 1 file changed, 25 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c
> > > b/drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c index
> > > 6709ab7ea1f3..398864b5e506 100644
> > > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c
> > > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-debug.c
> > > @@ -22,10 +22,11 @@ static inline u32 mxc_isi_read(struct mxc_isi_pipe
> > > *pipe, u32 reg)>
> > > static int mxc_isi_debug_dump_regs_show(struct seq_file *m, void *p)
> > > {
> > > #define MXC_ISI_DEBUG_REG(name) { name, #name }
> > >
> > > - static const struct {
> > > + struct debug_regs {
> > >
> > > u32 offset;
> > > const char * const name;
> > >
> > > - } registers[] = {
> > > + };
> > > + static const struct debug_regs registers[] = {
> > >
> > > MXC_ISI_DEBUG_REG(CHNL_CTRL),
> > > MXC_ISI_DEBUG_REG(CHNL_IMG_CTRL),
> > > MXC_ISI_DEBUG_REG(CHNL_OUT_BUF_CTRL),
> > >
> > > @@ -67,6 +68,16 @@ static int mxc_isi_debug_dump_regs_show(struct seq_file
> > > *m, void *p)>
> > > MXC_ISI_DEBUG_REG(CHNL_SCL_IMG_CFG),
> > > MXC_ISI_DEBUG_REG(CHNL_FLOW_CTRL),
> > >
> > > };
> > >
> > > + /* There registers contain the upper 4Bits of 36-Bit DMA addresses */
> >
> > s/There/These/
> >
> > > + static const struct debug_regs registers_36bit_dma[] = {
> > > + MXC_ISI_DEBUG_REG(CHNL_Y_BUF1_XTND_ADDR),
> > > + MXC_ISI_DEBUG_REG(CHNL_U_BUF1_XTND_ADDR),
> > > + MXC_ISI_DEBUG_REG(CHNL_V_BUF1_XTND_ADDR),
> > > + MXC_ISI_DEBUG_REG(CHNL_Y_BUF2_XTND_ADDR),
> > > + MXC_ISI_DEBUG_REG(CHNL_U_BUF2_XTND_ADDR),
> > > + MXC_ISI_DEBUG_REG(CHNL_V_BUF2_XTND_ADDR),
> > > + MXC_ISI_DEBUG_REG(CHNL_IN_BUF_XTND_ADDR),
> > > + };
> > >
> > > struct mxc_isi_pipe *pipe = m->private;
> > > unsigned int i;
> > >
> > > @@ -77,10 +88,21 @@ static int mxc_isi_debug_dump_regs_show(struct
> > > seq_file *m, void *p)>
> > > seq_printf(m, "--- ISI pipe %u registers ---\n", pipe->id);
> > >
> > > for (i = 0; i < ARRAY_SIZE(registers); ++i)
> > >
> > > - seq_printf(m, "%20s[0x%02x]: 0x%08x\n",
> > > + seq_printf(m, "%21s[0x%02x]: 0x%08x\n",
> > >
> > > registers[i].name, registers[i].offset,
> > > mxc_isi_read(pipe, registers[i].offset));
> > >
> > > + if (pipe->isi->pdata->has_36bit_dma) {
> > > + for (i = 0; i < ARRAY_SIZE(registers_36bit_dma); ++i) {
> > > + const struct debug_regs *reg = aregisters_36bit_dma[i];
> > > +
> > > + seq_printf(m, "%21s[0x%02x]: 0x%08x\n",
> > > + reg->name,
> > > + reg->offset,
> > > + mxc_isi_read(pipe, reg->offset));
> >
> > Lines should be aligned under the "m" of the first line.
> >
> > I'll fix these small issues when applying, no need to send a v3.
> >
> > Reviewed-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
>
> For the records: Also tested on TQMa8MxNL (imx8mn-tqma8mqnl-mba8mx.dts). As
> expected it prints only the same registers as before.
Thank you. Can I add
Tested-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx> # on imx8mn
?
> > > + }
> > > + }
> > > +
> > >
> > > pm_runtime_put(pipe->isi->dev);
> > >
> > > return 0;
--
Regards,
Laurent Pinchart
