Il 30/10/23 11:06, Moudy Ho ha scritto:
The MT8195 chipset features two MMSYS subsets: VPPSYS0 and VPPSYS1. These subsets coordinate and control the clock, power, and register settings required for the components of MDP3. Signed-off-by: Moudy Ho <moudy.ho@xxxxxxxxxxxx>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
