From: Alex Bee <knaerzche@xxxxxxxxx>
RK3288 contains a Rockchip VDEC block that only support HEVC
decoding. Add a vdec node for this.
Signed-off-by: Alex Bee <knaerzche@xxxxxxxxx>
Signed-off-by: Jonas Karlman <jonas@xxxxxxxxx>
---
arch/arm/boot/dts/rockchip/rk3288.dtsi | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rockchip/rk3288.dtsi b/arch/arm/boot/dts/rockchip/rk3288.dtsi
index cb9cdaddffd4..cdeb9c72dae1 100644
--- a/arch/arm/boot/dts/rockchip/rk3288.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288.dtsi
@@ -1277,6 +1277,21 @@ vpu_mmu: iommu@ff9a0800 {
power-domains = <&power RK3288_PD_VIDEO>;
};
+ hevc: video-codec@ff9c0000 {
+ compatible = "rockchip,rk3288-vdec";
+ reg = <0x0 0xff9c0000 0x0 0x440>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>,
+ <&cru SCLK_HEVC_CABAC>, <&cru SCLK_HEVC_CORE>;
+ clock-names = "axi", "ahb", "cabac", "core";
+ assigned-clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>,
+ <&cru SCLK_HEVC_CABAC>, <&cru SCLK_HEVC_CORE>;
+ assigned-clock-rates = <400000000>, <100000000>,
+ <300000000>, <300000000>;
+ iommus = <&hevc_mmu>;
+ power-domains = <&power RK3288_PD_HEVC>;
+ };
+
hevc_mmu: iommu@ff9c0440 {
compatible = "rockchip,iommu";
reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
@@ -1284,7 +1299,7 @@ hevc_mmu: iommu@ff9c0440 {
clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
clock-names = "aclk", "iface";
#iommu-cells = <0>;
- status = "disabled";
+ power-domains = <&power RK3288_PD_HEVC>;
};
gpu: gpu@ffa30000 {
--
2.42.0
