Hi Stefan, > Maybe you just hit a corner case or a bug, that can be avoid, in the I2C > device. Maybe check with the manufacturer directly? I don't have direct contact at Sony, I guess I can try to escalate this through the part supplier, but I won't hold my breath. > Do you know the I2C repeated start feature [1]? This allows to batch together > multiple I2C read/writes in a single transfer. And in the best case, this > transfer is executed in one go without a delay in between. At least in the > kernel it's guaranteed that no other driver can go in between with another > transfer. Sure, imx290.c sensor driver use repeated STARTs. In fact, it only makes things worse. The timeout counter seems to start with the regular START (falling edge of SDA), repeated STARTs don't reset it. After 2^18 + 8 or + 9 MCLK cycles, the sensor simply disconnects from the bus, generating pseudo-STOP if it was in the middle of its 0 bit (0->1 SDA change while SCL high) or starting sending pseudo-1 bits otherwise (0xFF data on read or negative ACK on write). This way repeated START -> longer transfer -> higher probability of failure. Not that it really matters. I don't know about in-sensor race conditions, for example on WRITE to the chip, when the ACK it interrupted by the timeout (this can be detected by the CPU, but not reliably, depending on actual timings). OTOH with my "always use atomic xfers with these sensors" hack to the i.MX I2C driver, it seems to work correctly (at least as far as I2C is concerned). I wonder if we could/should add some special handling of these sensors in the mainline kernel. local_irq_save() and the atomic path do the trick, but it would have to be done in all I2C drivers (or at least in ones used with these sensors). If no other devices need such treatment, well... Everyone can (possibly) use a non-official hack. Thanks for your input, -- Krzysztof "Chris" Hałasa Sieć Badawcza Łukasiewicz Przemysłowy Instytut Automatyki i Pomiarów PIAP Al. Jerozolimskie 202, 02-486 Warszawa