On 09/30/2010 09:52 PM, Michael Krufky wrote:
On Tue, Sep 28, 2010 at 2:46 PM, Mauro Carvalho Chehab
<mchehab@xxxxxxxxxx> wrote:
By default, tda18271 tries to optimize I2C bus by updating all registers
at the same time. Unfortunately, some devices doesn't support it.
The current logic has a problem when small_i2c is equal to 8, since there
are some transfers using 11 + 1 bytes.
Fix the problem by enforcing the max size at the right place, and allows
reducing it to max = 3 + 1.
Signed-off-by: Mauro Carvalho Chehab<mchehab@xxxxxxxxxx>
This looks to me as if it is working around a problem on the i2c
master. I believe that a fix like this really belongs in the i2c
master driver, it should be able to break the i2c transactions down
into transactions that the i2c master can handle.
I wouldn't want to merge this without a better explanation of why it
is necessary in the tda18271 driver. It seems to be a band-aid to
cover up a problem in the i2c master device driver code.
Yes it is I2C provider limitation, but I think almost all I2C adapters
have some limit. I suggest to set param for each tuner and demod driver
which splits reads and writes to len adapter can handle. I did that for
tda18218 write.
But there is one major point you don't see. It is not simple to add this
splitting limit to the provider. Provider does not have knowledge which
is meaning of bytes it transfers to the bus. Without knowledge it breaks
functionality surely in some point. There is commonly seen 1, 2 and 4
byte register address and same for register values. Also some chips like
to send data as register-value pairs.
regards,
Antti
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http://palosaari.fi/
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