Hi Krzysztof, On Fri, Nov 18, 2022 at 02:06:14PM +0100, Krzysztof Kozlowski wrote: > On 18/11/2022 10:39, Paul Elder wrote: > > From: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx> > > > > Add an example to the rockchip-isp1 DT binding that showcases usage of > > the parallel input of the ISP, connected to the CSI-2 receiver internal > > to the i.MX8MP. > > > > Signed-off-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx> > > Missing SoB. > > > --- > > .../bindings/media/rockchip-isp1.yaml | 72 +++++++++++++++++++ > > 1 file changed, 72 insertions(+) > > > > I don't know what do you demonstrate there... usage of endpoints? That's > the only difference. Such usage is the same everywhere, nothing specific > to this example. You already have two examples, so I don't think this > brings anything more. The i.MX8MP is the only SoC integrating this ISP (and supported in mainlineà that has an external CSI-2 receiver, as opposed to using the CSI-2 receiver from the ISP. This patch this showcases the DT integration for that use case. If you think it's not worth it, I'm fine dropping it. -- Regards, Laurent Pinchart
