Hi Bryan,
Thank you for the patch.
On Sat, Nov 12, 2022 at 05:26:49PM +0000, Bryan O'Donoghue wrote:
> The ports {} address and size cells definition is the same for every
> derived 8250 board so, we should define it in the core sm8250.dtsi.
You should also define the individual ports there. Endpoints are
board-specific as they represent connections, but ports are intrinsic
properties of the IP core integration in the SoC.
> Suggested-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxx>
> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@xxxxxxxxxx>
> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index d517d6a80bdcb..f28a8893d00d7 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -3412,6 +3412,11 @@ camss: camss@ac6a000 {
> "cam_hf_0_mnoc",
> "cam_sf_0_mnoc",
> "cam_sf_icp_mnoc";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> };
>
> camcc: clock-controller@ad00000 {
--
Regards,
Laurent Pinchart
