Hi Marco, On Fri, Sep 16, 2022 at 03:57:11PM +0200, Marco Felsch wrote: > Add support to report the link frequency. > > Signed-off-by: Marco Felsch <m.felsch@xxxxxxxxxxxxxx> > --- > The v1 of this small series can be found here: > https://lore.kernel.org/all/20220818144712.997477-1-m.felsch@xxxxxxxxxxxxxx/ > > Thanks a lot to Jacopo for the review feedback on my v1. > > Changelog: > > v2: > - use V4L2_CID_LINK_FREQ instead of V4L2_CID_PIXEL_RATE > --- > drivers/media/i2c/mt9m111.c | 21 ++++++++++++++++++++- > 1 file changed, 20 insertions(+), 1 deletion(-) > > diff --git a/drivers/media/i2c/mt9m111.c b/drivers/media/i2c/mt9m111.c > index afc86efa9e3e..52be1c310455 100644 > --- a/drivers/media/i2c/mt9m111.c > +++ b/drivers/media/i2c/mt9m111.c > @@ -1249,6 +1249,8 @@ static int mt9m111_probe(struct i2c_client *client) > { > struct mt9m111 *mt9m111; > struct i2c_adapter *adapter = client->adapter; > + static s64 extclk_rate; > + struct v4l2_ctrl *ctrl; > int ret; > > if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { > @@ -1271,6 +1273,13 @@ static int mt9m111_probe(struct i2c_client *client) > if (IS_ERR(mt9m111->clk)) > return PTR_ERR(mt9m111->clk); > > + ret = clk_prepare_enable(mt9m111->clk); > + if (ret < 0) > + return ret; > + > + extclk_rate = clk_get_rate(mt9m111->clk); > + clk_disable_unprepare(mt9m111->clk); I don't think you'll need to enable a clock to just get its frequency. > + > mt9m111->regulator = devm_regulator_get(&client->dev, "vdd"); > if (IS_ERR(mt9m111->regulator)) { > dev_err(&client->dev, "regulator not found: %ld\n", > @@ -1285,7 +1294,7 @@ static int mt9m111_probe(struct i2c_client *client) > mt9m111->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | > V4L2_SUBDEV_FL_HAS_EVENTS; > > - v4l2_ctrl_handler_init(&mt9m111->hdl, 7); > + v4l2_ctrl_handler_init(&mt9m111->hdl, 8); > v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, > V4L2_CID_VFLIP, 0, 1, 1, 0); > v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops, > @@ -1309,6 +1318,16 @@ static int mt9m111_probe(struct i2c_client *client) > BIT(V4L2_COLORFX_NEGATIVE) | > BIT(V4L2_COLORFX_SOLARIZATION)), > V4L2_COLORFX_NONE); > + /* > + * The extclk rate equals the link freq. if reg default values are used, > + * which is the case. This must be adapted as soon as we don't use the > + * default values anymore. > + */ > + ctrl = v4l2_ctrl_new_int_menu(&mt9m111->hdl, &mt9m111_ctrl_ops, > + V4L2_CID_LINK_FREQ, 0, 0, &extclk_rate); > + if (ctrl) > + ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY; > + > mt9m111->subdev.ctrl_handler = &mt9m111->hdl; > if (mt9m111->hdl.error) { > ret = mt9m111->hdl.error; -- Regards, Sakari Ailus
