Document VSPD found in RZ/G2L SoC. VSPD block is similar to VSP2-D found on R-Car SoC's, but it does not have a version register and it has 3 clocks compared to 1 clock on vsp1 and vsp2. This patch introduces a new compatible 'renesas,r9a07g044-vsp2' to handle these differences. Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx> Reviewed-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx> --- v12->v13: * No change. v11->v12: * No change. v10->v11: * No change v9->v10: * No change v8->v9: * No change v7->v8: * Added Clock-names to false for Non RZ/G2L SoC's * Replaced compatble 'renesas,rzg2l-vsp2'->'renesas,r9a07g044-vsp2' * Removed RZ/V2L SoC, will be added later after testing it. * Added Rb tag from Laurent. v6->v7: * No change v5->v6: * Removed LCDC reference clock description * Changed the clock name from du.0->aclk v4->v5: * No change v3->v4: * No change v2->v3: * Added Rb tag from Krzysztof. v1->v2: * Changed compatible from vsp2-rzg2l->rzg2l-vsp2 RFC->v1: * Updated commit description * Changed compatible from vsp2-r9a07g044->vsp2-rzg2l * Defined the clocks * Clock max Items is based on SoC Compatible string RFC: * https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-20-biju.das.jz@xxxxxxxxxxxxxx/ --- .../bindings/media/renesas,vsp1.yaml | 53 ++++++++++++++----- 1 file changed, 40 insertions(+), 13 deletions(-) diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml index 990e9c1dbc43..7a8f32473852 100644 --- a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml +++ b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml @@ -17,6 +17,7 @@ description: properties: compatible: enum: + - renesas,r9a07g044-vsp2 # RZ/G2L - renesas,vsp1 # R-Car Gen2 and RZ/G1 - renesas,vsp2 # R-Car Gen3 and RZ/G2 @@ -26,8 +27,8 @@ properties: interrupts: maxItems: 1 - clocks: - maxItems: 1 + clocks: true + clock-names: true power-domains: maxItems: 1 @@ -50,17 +51,43 @@ required: additionalProperties: false -if: - properties: - compatible: - items: - - const: renesas,vsp1 -then: - properties: - renesas,fcp: false -else: - required: - - renesas,fcp +allOf: + - if: + properties: + compatible: + contains: + const: renesas,vsp1 + then: + properties: + renesas,fcp: false + else: + required: + - renesas,fcp + + - if: + properties: + compatible: + contains: + const: renesas,r9a07g044-vsp2 + then: + properties: + clocks: + items: + - description: Main clock + - description: Register access clock + - description: Video clock + clock-names: + items: + - const: aclk + - const: pclk + - const: vclk + required: + - clock-names + else: + properties: + clocks: + maxItems: 1 + clock-names: false examples: # R8A7790 (R-Car H2) VSP1-S -- 2.25.1
