Hello again, After digging down NXP's documentation and reading some comments within kernel drivers (sorry Jacopo, you've left some nice comments in imx7-media-csi.c, hence you're spammed now :) i came to the conclusion that mipi-csi to csi-bridge data path can only be 8bits in raw12 format. The only exception is YUV422 format, which get BIT_MIPI_DOUBLE_CMPNT flag set. So i guess there are two questions: a) can the csi-bridge (and mipi-csi) be persuaded to do two-bytes for raw12 format; b) what's the maximum frequency for csi-bridge PIXCLK? I've increased PIXCLK up to 1ghz (as opposed to the default 500mhz) and this seem to hung the bridge. cheers, Petko On 22-08-15 16:52:59, Petko Manolov wrote: > Hello guys, > > I'm developing a driver for Sony imx492 sensor and i'm using imx8m-mini > (Variscite SoM on Symphony carrier board) platform. Thanks to Laurent i dumped > the vendor mipi-csi and csi-bridge drivers in favor of mainline (v5.19-rc6 atm) > and parts started to click in place. However, there are still a few rough > edges. > > The sensor is 47mpix, and is only capable of streaming over all four CSI-2 > lanes. Each lane is 1.728gbit, which makes 6.912gbps total bandwidth. > imx8m-mini's d-phy can handle (on paper) up to 6gbps. > > I guess the main question here is: what's the fastest transfer rate that's known > to work with this SoC? Does anyone have experience with imx8m-mini in this > regard? > > > Even with the settings that i'm able to obtain a (distorted) test pattern image > with, i keep getting tons of: > > [99910.847591] imx-mipi-csis 32e30000.mipi-csi: FIFO Overflow Error events: 1353347 > > IRQs also look a suspicious on the 'csi' part: > > 214: 2653716 0 0 0 GICv3 49 Level 32e30000.mipi-csi > 215: 2 0 0 0 GICv3 48 Level csi > > That's with this clock setup: > > sys_pll2 1 1 0 1000000000 0 0 50000 Y > sys_pll2_out 5 5 0 1000000000 0 0 50000 Y > sys_pll2_1000m 3 3 0 1000000000 0 0 50000 Y > csi1_phy_ref 1 1 0 1000000000 0 0 50000 Y > csi1_core 1 1 0 500000000 0 0 50000 Y > csi1_root_clk 1 1 0 500000000 0 0 50000 Y > > However, if i change the latter two (csi1_core & csi1_root_clk) to 1ghz, there > are still mipi-csi IRQs coming in, but nothing from the csi-bridge. > > Any advice on where i shall start looking first? > > > thanks, > Petko
