On 5/25/22 1:58 PM, Paul Kocialkowski wrote: > The V3s uses the mbus interconnect to provide DRAM access for a > number of blocks. The SoC can only map 2 GiB of DRAM, which is > reflected in the dma-ranges property. > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@xxxxxxxxxxx> Reviewed-by: Samuel Holland <samuel@xxxxxxxxxxxx>
