The RZ/G2L VSPD provides a single VSPD instance. It has the following sub modules MAU, CTU, RPF, DPR, LUT, BRS, WPF and LIF. The VSPD block on RZ/G2L does not have a version register, so added a new compatible string "renesas,rzg2l-vsp2" with a data pointer containing the info structure. Also the reset line is shared with the DU module. v6->v7: * Added Rb tag from Kieran for patch#3 * Added a quirk to handle LIF0 buffer attribute related changes for V3M and G2L. * Removed the macro for VSP HW version v5->v6: * Rebased to media_staging and updated commit header * Removed LCDC reference clock description from bindings * Changed the clock name from du.0->aclk from bindings * Added Rb tag from Laurent for reset patch * Added forward declaration for struct reset_control * Updated vsp1_device_get() with changes suggested by Laurent * Updated error message for reset_control_get form ctrl->control. * Removed the extra tab from rzg2l_vsp2_device_info * Changed the function vsp1_lookup->vsp1_lookup_info and all info match related code moved here. * Add VI6_IP_VERSION_VSP and VI6_IP_VERSION_VSP_SW macros to distinguish HW & SW IP_VSP_Version. * Used 0x80 for RZG2L VSPD model and SoC identification * Updated Switch() for LIF0 buffer attribute handling. v4->v5: * Fixed typo VI6_IP_VERSION_MODEL_MASK->VI6_IP_VERSION_MASK * To be consistent with other SoC's, introduced VI6_IP_VERSION_SOC_G2L for SoC identification for RZ/G2L SoC's. v3->v4: * Restored error check for pm_runtime_resume_and_get and calls assert() in case of failure. * Added Rb tag from Geert * Add switch() for LIF0 buffer attribute handling for RZ/G2L and V3M SoC's v2->v3: * Added Rb tags from Krzysztof and Philipp * If reset_control_deassert() failed, return ret directly. * Fixed version comparison in vsp1_lookup() v1->v2: * Used reference counted reset handle to perform deassert/assert * Changed the compatible from vsp2-rzg2l->rzg2l-vsp2 * Added standalone device info for rzg2l-vsp2. * Added vsp1_lookup helper function. * Updated comments for LIF0 buffer attribute register * Used last ID for rzg2l-vsp2. RFC->v1: * Added reset support as separate patch * Moved rstc just after the bus_master field in struct vsp1_device * Used data pointer containing info structure to retrieve version information * Updated commit description * Changed compatible from vsp2-r9a07g044->vsp2-rzg2l * Defined the clocks * Clock max Items is based on SoC Compatible string RFC: * https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-21-biju.das.jz@xxxxxxxxxxxxxx/ * https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-20-biju.das.jz@xxxxxxxxxxxxxx/ Biju Das (3): media: dt-bindings: media: renesas,vsp1: Document RZ/{G2L,V2L} VSPD bindings media: renesas: vsp1: Add support to deassert/assert reset line media: renesas: vsp1: Add support for RZ/G2L VSPD .../bindings/media/renesas,vsp1.yaml | 52 +++++++++--- drivers/media/platform/renesas/vsp1/vsp1.h | 5 ++ .../media/platform/renesas/vsp1/vsp1_drv.c | 83 +++++++++++++++---- .../media/platform/renesas/vsp1/vsp1_lif.c | 13 +-- .../media/platform/renesas/vsp1/vsp1_lif.h | 1 + .../media/platform/renesas/vsp1/vsp1_regs.h | 7 ++ 6 files changed, 126 insertions(+), 35 deletions(-) -- 2.25.1
