The Microchip XISC supports a bus width of 14 bits.
Add it to the supported bus widths.
Signed-off-by: Eugen Hristev <eugen.hristev@xxxxxxxxxxxxx>
Acked-by: Rob Herring <robh@xxxxxxxxxx>
---
Documentation/devicetree/bindings/media/microchip,xisc.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/media/microchip,xisc.yaml b/Documentation/devicetree/bindings/media/microchip,xisc.yaml
index 086e1430af4f..3be8f64c3e21 100644
--- a/Documentation/devicetree/bindings/media/microchip,xisc.yaml
+++ b/Documentation/devicetree/bindings/media/microchip,xisc.yaml
@@ -67,7 +67,7 @@ properties:
remote-endpoint: true
bus-width:
- enum: [8, 9, 10, 11, 12]
+ enum: [8, 9, 10, 11, 12, 14]
default: 12
hsync-active:
--
2.25.1
