Reviewing the RB5 schematic its clear that we have missed out on defining
both of the power-rails associated with the CSI PHY.
Other PHYs such as the UFS, PCIe and USB connect to these rails and define
each regulator individually.
This means if we were to switch off the other various PHYs which enable
these rails, the CAMSS would not appropriately power-on the CSI PHY.
Reviewed-by: Robert Foss <robert.foss@xxxxxxxxxx>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx>
---
drivers/media/platform/qcom/camss/camss.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index 859b397912cc8..a2f97311f7606 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -723,7 +723,7 @@ static const struct resources csiphy_res_8250[] = {
static const struct resources csid_res_8250[] = {
/* CSID0 */
{
- .regulators = { NULL },
+ .regulators = { "vdda-phy", "vdda-pll" },
.clock = { "vfe0_csid", "vfe0_cphy_rx", "vfe0", "vfe0_areg", "vfe0_ahb" },
.clock_rate = { { 400000000 },
{ 400000000 },
@@ -735,7 +735,7 @@ static const struct resources csid_res_8250[] = {
},
/* CSID1 */
{
- .regulators = { NULL },
+ .regulators = { "vdda-phy", "vdda-pll" },
.clock = { "vfe1_csid", "vfe1_cphy_rx", "vfe1", "vfe1_areg", "vfe1_ahb" },
.clock_rate = { { 400000000 },
{ 400000000 },
@@ -747,7 +747,7 @@ static const struct resources csid_res_8250[] = {
},
/* CSID2 */
{
- .regulators = { NULL },
+ .regulators = { "vdda-phy", "vdda-pll" },
.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx", "vfe_lite", "vfe_lite_ahb" },
.clock_rate = { { 400000000 },
{ 400000000 },
@@ -758,7 +758,7 @@ static const struct resources csid_res_8250[] = {
},
/* CSID3 */
{
- .regulators = { NULL },
+ .regulators = { "vdda-phy", "vdda-pll" },
.clock = { "vfe_lite_csid", "vfe_lite_cphy_rx", "vfe_lite", "vfe_lite_ahb" },
.clock_rate = { { 400000000 },
{ 400000000 },
--
2.33.0
