Add bindings documentation for Microchip CSI2 Demultiplexer controller. CSI2DC is a demultiplexer from Synopsys IDI interface specification to parallel interface connection or direct memory access. Signed-off-by: Eugen Hristev <eugen.hristev@xxxxxxxxxxxxx> --- Changes in v2: - changed the endpoint/port references as suggested by Rob Changes in this version : - fixed 'sink' name to be actually source. - added dma properties and example with dma Previous change log: Changes in v5: - modified bindings as per Rob Herring review Changes in v4: - Removed property for inter-line-delay and for clock continuous/non-continuous - Removed virtual channel by reg for second endpoint Changes in v3: - Removed some text from description, as it was explained in the schema - fixed other things as per Rob's review - moved some text inside the schema, like the clock description Changes in v2: - fixed warnings reported by dt_binding_check .../bindings/media/microchip,csi2dc.yaml | 159 ++++++++++++++++++ 1 file changed, 159 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/microchip,csi2dc.yaml diff --git a/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml b/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml new file mode 100644 index 000000000000..45418c964bf3 --- /dev/null +++ b/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml @@ -0,0 +1,159 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/microchip,csi2dc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip CSI2 Demux Controller (CSI2DC) + +maintainers: + - Eugen Hristev <eugen.hristev@xxxxxxxxxxxxx> + +description: + CSI2DC - Camera Serial Interface 2 Demux Controller + + CSI2DC is a hardware block that receives incoming data from an IDI interface + and filters packets based on their data type and virtual channel identifier, + then converts the byte stream into a cross clock domain to a pixel stream + to a parallel interface that can be read by a sensor controller. + IDI interface is Synopsys proprietary. + + CSI2DC provides two pipes, one video pipe and one data pipe. Video pipe + is connected to a sensor controller and the data pipe is accessible + as a DMA slave port to a DMA controller. + + CSI2DC supports a single 'port' node as a sink port with Synopsys 32-bit + IDI interface. The connected endpoint must be a IDI interface compatible + device , that can provide 32-bit IDI interface connection as source port. + This port is mandatory. + + CSI2DC supports one 'port' node as source port with parallel interface. + This is called video pipe. + This port has an 'endpoint' that can be connected to a sink port of another + controller (next in pipeline). + + CSI2DC also supports direct access to the data through AHB, via DMA channel, + called data pipe. + Because of this, the source 'port' child node (second) is not mandatory. + If the source 'port' child node is missing, only data pipe is available. + For data pipe to be available, a dma controller must be referenced. + +properties: + compatible: + const: microchip,sama7g5-csi2dc + + reg: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + description: + CSI2DC must have two clocks to function correctly. One clock is the + peripheral clock for the inside functionality of the hardware block. + This is named 'pclk'. The second clock must be the cross domain clock, + in which CSI2DC will perform clock crossing. This clock must be fed + by the next controller in pipeline, which usually is a sensor controller. + Normally this clock should be given by this sensor controller who + is also a clock source. This clock is named 'scck', sensor controller clock. + items: + - const: pclk + - const: scck + + dmas: + maxItems: 1 + + dma-names: + const: rx + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: + Input port node, single endpoint describing the input port. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + description: Endpoint connected to input device + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: + Output port node, single endpoint describing the output port. + + properties: + endpoint: + unevaluatedProperties: false + $ref: video-interfaces.yaml# + description: Endpoint connected to output device + + required: + - port@0 + +additionalProperties: false + +required: + - compatible + - reg + - clocks + - clock-names + - ports + +examples: + # Example for connecting to a parallel sensor controller block + - | + csi2dc@e1404000 { + compatible = "microchip,sama7g5-csi2dc"; + reg = <0xe1404000 0x500>; + clocks = <&pclk>, <&scck>; + clock-names = "pclk", "scck"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; /* must be 0, first child port */ + csi2dc_in: endpoint { /* input from IDI interface */ + remote-endpoint = <&csi2host_out>; + }; + }; + + port@1 { + reg = <1>; /* must be 1, second child port */ + csi2dc_out: endpoint { + remote-endpoint = <&xisc_in>; /* output to sensor controller */ + }; + }; + }; + }; + + # Example for connecting to a DMA master as an AHB slave + - | + #include <dt-bindings/dma/at91.h> + csi2dc@e1404000 { + compatible = "microchip,sama7g5-csi2dc"; + reg = <0xe1404000 0x500>; + clocks = <&pclk>, <&scck>; + clock-names = "pclk", "scck"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(34)>; + dma-names = "rx"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; /* must be 0, first child port */ + csi2dc_input: endpoint { /* input from IDI interface */ + remote-endpoint = <&csi2host_out>; + }; + }; + }; + }; + +... -- 2.25.1
