Hi Hans, I love your patch! Perhaps something to improve: [auto build test WARNING on clk/clk-next] [also build test WARNING on rafael-pm/linux-next linus/master v5.15-rc7] [cannot apply to broonie-regulator/for-next next-20211026] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Hans-de-Goede/Add-support-for-X86-ACPI-camera-sensor-PMIC-setup-with-clk-and-regulator-platform-data/20211025-174519 base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next config: arm64-randconfig-s032-20211027 (attached as .config) compiler: aarch64-linux-gcc (GCC) 11.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # apt-get install sparse # sparse version: v0.6.4-dirty # https://github.com/0day-ci/linux/commit/0b2b8f7e89ea8038d69e3c9918647d9204fb3e4c git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Hans-de-Goede/Add-support-for-X86-ACPI-camera-sensor-PMIC-setup-with-clk-and-regulator-platform-data/20211025-174519 git checkout 0b2b8f7e89ea8038d69e3c9918647d9204fb3e4c # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/clk/ fs/fuse/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@xxxxxxxxx> sparse warnings: (new ones prefixed by >>) >> drivers/clk/clk-tps68470.c:38:3: sparse: sparse: symbol 'clk_freqs' was not declared. Should it be static? vim +/clk_freqs +38 drivers/clk/clk-tps68470.c 27 28 #define to_tps68470_clkdata(clkd) \ 29 container_of(clkd, struct tps68470_clkdata, clkout_hw) 30 31 struct tps68470_clkout_freqs { 32 unsigned long freq; 33 unsigned int xtaldiv; 34 unsigned int plldiv; 35 unsigned int postdiv; 36 unsigned int buckdiv; 37 unsigned int boostdiv; > 38 } clk_freqs[] = { 39 /* 40 * The PLL is used to multiply the crystal oscillator 41 * frequency range of 3 MHz to 27 MHz by a programmable 42 * factor of F = (M/N)*(1/P) such that the output 43 * available at the HCLK_A or HCLK_B pins are in the range 44 * of 4 MHz to 64 MHz in increments of 0.1 MHz 45 * 46 * hclk_# = osc_in * (((plldiv*2)+320) / (xtaldiv+30)) * (1 / 2^postdiv) 47 * 48 * PLL_REF_CLK should be as close as possible to 100kHz 49 * PLL_REF_CLK = input clk / XTALDIV[7:0] + 30) 50 * 51 * PLL_VCO_CLK = (PLL_REF_CLK * (plldiv*2 + 320)) 52 * 53 * BOOST should be as close as possible to 2Mhz 54 * BOOST = PLL_VCO_CLK / (BOOSTDIV[4:0] + 16) * 55 * 56 * BUCK should be as close as possible to 5.2Mhz 57 * BUCK = PLL_VCO_CLK / (BUCKDIV[3:0] + 5) 58 * 59 * osc_in xtaldiv plldiv postdiv hclk_# 60 * 20Mhz 170 32 1 19.2Mhz 61 * 20Mhz 170 40 1 20Mhz 62 * 20Mhz 170 80 1 24Mhz 63 * 64 */ 65 { 19200000, 170, 32, 1, 2, 3 }, 66 { 20000000, 170, 40, 1, 3, 4 }, 67 { 24000000, 170, 80, 1, 4, 8 }, 68 }; 69 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx
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