On 22/07/2021 08:27, Krzysztof Hałasa wrote: > Hans, > > I have a problem with matching H/V sync polarities. It appears the > standard modes use different polarity settings, and HDMI doesn't have > separate sync lines, it uses in-band signaling. I don't know what > polarity should I set for the v4l2_find_dv_timings_cap() -> > v4l2_match_dv_timings() to succeed. The tda1997x doesn't have any method of obtaining the sync polarities? HSync and VSync are, as you say, using in-band signaling, but the 'polarity' still matters when it comes to detecting timings. All HDMI receivers I have ever seen have a register that reports the polarities. I find it *very* hard to imagine that this device doesn't support that. Do you have a datasheet for this device? > > 1. I can try all 4 combinations (+/+, +/-, -/+, -/-) and see if there is > a match. Seems weird to me. > > 2. I can add a flag to v4l2_find_dv_timings_cap() -> > v4l2_match_dv_timings() which asks for the polarities to be ignored. > > 3. I could add > #define V4L2_DV_VSYNC_POS_POL 0x00000001 > #define V4L2_DV_HSYNC_POS_POL 0x00000002 > +#define V4L2_DV_VSYNC_ANY_POL 0x00000004 > +#define V4L2_DV_HSYNC_ANY_POL 0x00000008 > > and v4l2_match_dv_timings() would skip comparing them. A bit hacky. > > 4. I could also add > #define V4L2_DV_VSYNC_POS_POL 0x00000001 > #define V4L2_DV_HSYNC_POS_POL 0x00000002 > +#define V4L2_DV_VSYNC_NEG_POL 0x00000004 > +#define V4L2_DV_HSYNC_NEG_POL 0x00000008 > > and, likewise, v4l2_match_dv_timings() would know what to do. This is > IMHO cleaner but requires much more changes in other code (like > drivers). > > Any other idea? > Perhaps I should do "2"? If there really is no register that reports the polarities, then option 2 is the best approach. There are other reasons why you might want to ignore the polarities: not all video sources use the correct polarities. What I think would be best is to make a flags argument that allows the match code to skip certain tests: #define V4L2_DV_TIM_IGNORE_POLARITIES BIT(0) #define V4L2_DV_TIM_IGNORE_HPORCHES BIT(1) #define V4L2_DV_TIM_IGNORE_VPORCHES BIT(2) #define V4L2_DV_TIM_IGNORE_HSYNC BIT(3) #define V4L2_DV_TIM_IGNORE_VSYNC BIT(4) IGNORE_HPORCHES would just check hsync and total horizontal blanking, IGNORE_HSYNC would just check total horizontal blanking. IGNORE_HSYNC implies IGNORE_HPORCHES. Regards, Hans
