Document the device tree bindings for the Synopsys DesignWare HDMI RX Controller. Signed-off-by: Jose Abreu <jose.abreu@xxxxxxxxxxxx> Signed-off-by: Nelson Costa <nelson.costa@xxxxxxxxxxxx> --- .../devicetree/bindings/media/snps,dw-hdmi-rx.yaml | 98 ++++++++++++++++++++++ 1 file changed, 98 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/snps,dw-hdmi-rx.yaml diff --git a/Documentation/devicetree/bindings/media/snps,dw-hdmi-rx.yaml b/Documentation/devicetree/bindings/media/snps,dw-hdmi-rx.yaml new file mode 100644 index 0000000..4f2169e --- /dev/null +++ b/Documentation/devicetree/bindings/media/snps,dw-hdmi-rx.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/snps,dw-hdmi-rx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare HDMI RX Controller Device Tree Bindings + +maintainers: + - Jose Abreu <jose.abreu@xxxxxxxxxxxx> + - Nelson Costa <nelson.costa@xxxxxxxxxxxx> + +description: | + The Synopsys DesignWare HDMI RX Controller and PHYs e405/e406 is an HDMI 2.0 + Receiver solution that is able to decode video and audio. + +properties: + compatible: + const: snps,dw-hdmi-rx + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + description: | + phandle to the configuration clock + + clock-names: + const: cfg + + phys: + maxItems: 1 + description: | + phandle for the HDMI RX PHY + + phy-names: + const: hdmi-phy + + port: + $ref: /schemas/graph.yaml#/properties/port + description: | + Input port node, multiple endpoints describing the HDMI RX data connected + to the HDMI PHY receiver. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - phys + - phy-names + - port + +additionalProperties: false + +examples: + - | + hdmi_rx: hdmi-rx@0 { + compatible = "snps,dw-hdmi-rx"; + reg = <0x0 0x10000>; + interrupts = <1 2>; + + clocks = <&dw_hdmi_refclk>; + clock-names = "cfg"; + + phys = <&hdmi_e406_phy>; + phy-names = "hdmi-phy"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + hdmi_rx_0: endpoint@0 { + reg = <0>; + remote-endpoint = <&hdmi_e406_phy_0>; + }; + + hdmi_rx_1: endpoint@1 { + reg = <1>; + remote-endpoint = <&hdmi_e406_phy_1>; + }; + + hdmi_rx_2: endpoint@2 { + reg = <2>; + remote-endpoint = <&hdmi_e406_phy_2>; + }; + + hdmi_rx_3: endpoint@3 { + reg = <3>; + remote-endpoint = <&hdmi_e406_phy_3>; + }; + }; + }; -- 2.7.4