Hi Ezequiel, Am Sonntag, dem 16.05.2021 um 19:40 -0300 schrieb Ezequiel Garcia: > Hi Lucas, > > On Fri, 2021-04-16 at 12:54 +0200, Lucas Stach wrote: > > Am Mittwoch, dem 07.04.2021 um 09:35 +0200 schrieb Benjamin Gaignard: > > > In order to be able to share the control hardware block between > > > VPUs use a syscon instead a ioremap it in the driver. > > > To keep the compatibility with older DT if 'nxp,imx8mq-vpu-ctrl' > > > phandle is not found look at 'ctrl' reg-name. > > > With the method it becomes useless to provide a list of register > > > names so remove it. > > > > Sorry for putting a spoke in the wheel after many iterations of the > > series. > > > > We just discussed a way forward on how to handle the clocks and resets > > provided by the blkctl block on i.MX8MM and later and it seems there is > > a consensus on trying to provide virtual power domains from a blkctl > > driver, controlling clocks and resets for the devices in the power > > domain. I would like to avoid introducing yet another way of handling > > the blkctl and thus would like to align the i.MX8MQ VPU blkctl with > > what we are planning to do on the later chip generations. > > > > CC'ing Jacky Bai and Peng Fan from NXP, as they were going to give this > > virtual power domain thing a shot. > > > > It seems the i.MX8MM BLK-CTL series are moving forward: > > https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=479175 > > ... but I'm unable to wrap my head around how this affects the > devicetree VPU modelling for i.MX8MQ (and also i.MX8MM, i.MX8MP, ...). > > For the i.MX8MQ we want to have the same virtual power-domains provided by a BLK-CTRL driver for the VPUs, as on i.MX8MM. This way we should be able to use the same DT bindings for the VPUs on i.MX8MQ and i.MX8MM, even though the SoC integration with the blk-ctrl is a little different. > Can you clarify that? > I'm planning on sending some patches adding i.MX8MQ VPU support to the BLK-CTRL driver in the next few days. I guess that should clarify things. :) Regards, Lucas
