There's no need to read the CSICR1 register before each write in
imx7_csi_rx_fifo_clear(). Simplify the function.
Signed-off-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
---
drivers/staging/media/imx/imx7-media-csi.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c
index 7871ad55060a..85ab733a2c4f 100644
--- a/drivers/staging/media/imx/imx7-media-csi.c
+++ b/drivers/staging/media/imx/imx7-media-csi.c
@@ -294,14 +294,10 @@ static void imx7_csi_dma_reflash(struct imx7_csi *csi)
static void imx7_csi_rx_fifo_clear(struct imx7_csi *csi)
{
- u32 cr1;
+ u32 cr1 = imx7_csi_reg_read(csi, CSI_CSICR1) & ~BIT_FCC;
- cr1 = imx7_csi_reg_read(csi, CSI_CSICR1);
- imx7_csi_reg_write(csi, cr1 & ~BIT_FCC, CSI_CSICR1);
- cr1 = imx7_csi_reg_read(csi, CSI_CSICR1);
+ imx7_csi_reg_write(csi, cr1, CSI_CSICR1);
imx7_csi_reg_write(csi, cr1 | BIT_CLR_RXFIFO, CSI_CSICR1);
-
- cr1 = imx7_csi_reg_read(csi, CSI_CSICR1);
imx7_csi_reg_write(csi, cr1 | BIT_FCC, CSI_CSICR1);
}
--
Regards,
Laurent Pinchart
