Hi Paul, On Fri, Oct 23, 2020 at 07:45:39PM +0200, Paul Kocialkowski wrote: > This introduces YAML bindings documentation for the A31 MIPI CSI-2 > controller. > > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@xxxxxxxxxxx> > --- > .../media/allwinner,sun6i-a31-mipi-csi2.yaml | 168 ++++++++++++++++++ > 1 file changed, 168 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml > > diff --git a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml > new file mode 100644 > index 000000000000..9adc0bc27033 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml > @@ -0,0 +1,168 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-mipi-csi2.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Allwinner A31 MIPI CSI-2 Device Tree Bindings > + > +maintainers: > + - Paul Kocialkowski <paul.kocialkowski@xxxxxxxxxxx> > + > +properties: > + compatible: > + oneOf: > + - const: allwinner,sun6i-a31-mipi-csi2 > + - items: > + - const: allwinner,sun8i-v3s-mipi-csi2 > + - const: allwinner,sun6i-a31-mipi-csi2 > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + items: > + - description: Bus Clock > + - description: Module Clock > + > + clock-names: > + items: > + - const: bus > + - const: mod > + > + phys: > + items: > + - description: MIPI D-PHY > + > + phy-names: > + items: > + - const: dphy > + > + resets: > + maxItems: 1 > + > + # See ./video-interfaces.txt for details > + ports: > + type: object > + > + properties: > + port@0: > + type: object > + description: Input port, connect to a MIPI CSI-2 sensor > + > + properties: > + reg: > + const: 0 > + > + endpoint: > + type: object > + > + properties: > + remote-endpoint: true > + > + bus-type: > + const: 4 > + > + clock-lanes: > + maxItems: 1 You can drop bus-type and clock-lanes (assuming no lane remapping is supported by the hardware). > + > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + required: > + - bus-type > + - data-lanes > + - remote-endpoint > + > + additionalProperties: false > + > + required: > + - endpoint > + > + additionalProperties: false > + > + port@1: > + type: object > + description: Output port, connect to a CSI controller > + > + properties: > + reg: > + const: 1 > + > + endpoint: > + type: object > + > + properties: > + remote-endpoint: true > + > + bus-type: > + const: 4 Same here. > + > + additionalProperties: false > + > + required: > + - endpoint > + > + additionalProperties: false > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + - resets > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/sun8i-v3s-ccu.h> > + #include <dt-bindings/reset/sun8i-v3s-ccu.h> > + > + mipi_csi2: mipi-csi2@1cb1000 { > + compatible = "allwinner,sun8i-v3s-mipi-csi2", > + "allwinner,sun6i-a31-mipi-csi2"; > + reg = <0x01cb1000 0x1000>; > + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_CSI>, > + <&ccu CLK_CSI1_SCLK>; > + clock-names = "bus", "mod"; > + resets = <&ccu RST_BUS_CSI>; > + > + phys = <&dphy>; > + phy-names = "dphy"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + mipi_csi2_in: port@0 { > + reg = <0>; > + > + mipi_csi2_in_ov5648: endpoint { > + bus-type = <4>; /* MIPI CSI-2 D-PHY */ > + clock-lanes = <0>; > + data-lanes = <1 2 3 4>; > + > + remote-endpoint = <&ov5648_out_mipi_csi2>; > + }; > + }; > + > + mipi_csi2_out: port@1 { > + reg = <1>; > + > + mipi_csi2_out_csi0: endpoint { > + bus-type = <4>; /* MIPI CSI-2 D-PHY */ > + remote-endpoint = <&csi0_in_mipi_csi2>; > + }; > + }; > + }; > + }; > + > +... -- Kind regards, Sakari Ailus