On 10/29/20 8:36 AM, Sowjanya Komatineni wrote:
On 10/29/20 7:50 AM, Sakari Ailus wrote:
Hi Sowjanya,
On Wed, Oct 28, 2020 at 06:48:59PM -0700, Sowjanya Komatineni wrote:
Hi Sakari,
Missed to add you to below patch series for HDMI2CSI bridge support
https://patchwork.kernel.org/project/linux-media/cover/1603768763-25590-1-git-send-email-skomatineni@xxxxxxxxxx/
Patch-10 of this series is for x8 capture from HDMI2CSI bridge.
Would like to get your suggestion on x8 gang/combined ports capture
implementation.
The majority of CSI-2 receiver devices support partitioning the lanes
among
different PHYs in various ways. They do support usually up to four
lanes,
but adding four more lanes is not a reason for making the API different.
So instead, you should implement this as a single port that simply has 8
lanes.
Thanks Sakari for your reply.
current v2 series treats as 8 lanes. You mean to not expose 2nd port
in device tree as VI/CSI side takes care of 2nd port as combined to
treat as 8 lane?
AS csi2 bus type supports max 4 data lanes with endpoint parse API.
Currently with x8 as single port, I am using bus-width with bus type as
parallel in device tree and when using x4 using data-lanes with csi2 bus
type and driver gets lanes based on either of this from DT.
Instead should we update endpoint parse API for max up to 8 lanes for
data-lanes?
Thanks
Sowjanya
